dcm_locked输入处理器系统重置ip

我有一个设计，我使用2个时钟域，用MMCM创建（我需要一个级联来获得我需要的确切频率）。
我已将'处理器系统复位'模块连接到clk_out1和clk_out2时钟输出，因此每个域都会正确复位。
我（想）我可以在这里使用单个复位IP，并连接2个时钟中最慢的时钟，但如果没有我的硬件（正在开发中），第二个clk_out2端口模拟一个异步板时钟，稍后将进入我的设备。
clk_ou1是100MHz，我把clk_out2设置为13MHz，或多或少地模拟异步时钟输入。
2个问题：
1）我应该使用处理器系统复位的dcm_locked输入并将其连接到时钟向导的锁定引脚（此处未启用），还是可选的？
2）我可以以某种方式“重置/同步”重置IP，所以他们都等到两个时钟的重置完成？
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以下为原文

I have a design in which I use 2 clock domains, created with MMCM's (I needed a cascade to get me the exact frequency that I needed).

I've connected a 'Processor System Reset' block to both clk_out1 and clk_out2 clock outputs, so each domain gets it's proper reset.

I (think) I could use a single reset IP here, and connect the slowest of the 2 clocks,  but in absence of my hardware (under development), this second clk_out2 port simulates an asynchronous board clock that later will enter my device. clk_ou1 is 100MHz, and I put clk_out2 to 13MHz, to more or less simulate an async clock input.

2 questions :

1) should I use the dcm_locked input of the Processor System Reset and connect it to the lock pin of the clocking wizard (not enabled here), or is this optional?

2) can I somehow 'connect/synchronize' the reset IP's to each other, so they both wait until the reset completes for both clocks?


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