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嗨伙计,
在使用HD流在Vivado中构建OOC模块时,我遇到了DRC违规,无法找到有关它的任何信息。 错误:[Drc 23-20]规则违规(REQP-1619)IBUFDS_GTE2_driven_by_IBUF - IBUFDS_GTE2 refclk_ibuf引脚I和IB应由IBUF驱动。 查看网表,IBUFDS_GTE2实例连接到输入焊盘,即。 没有IBUF。 根据收发器用户指南,那里应该没有IBUF,只有顶级端口。 也许这假设顶级综合将在那里自动推断出两个IBUF? 在这种情况下,OOC模块应该实例化IBUF。 这个假设是否正确? 提前致谢, -拍 http://tuxengineering.com 以上来自于谷歌翻译 以下为原文 Hi folks, While building an OOC module in Vivado using the HD flow, I'm getting this DRC violation and can't find any information about it. ERROR: [Drc 23-20] Rule violation (REQP-1619) IBUFDS_GTE2_driven_by_IBUF - IBUFDS_GTE2 refclk_ibuf pins I and IB should be driven by IBUFs. Looking at the netlist, the IBUFDS_GTE2 instance is connected to input pads, ie. no IBUF. And according to the transceivers user guide, there should be no IBUF there, just top level ports. Perhaps this assumes that the top level synthesis will infer two IBUFs automatically there? In this case, the OOC module should instantiate IBUFs. Is this assumption correct? Thanks in advance, -Pat http://tuxengineering.com |
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嗨,Pat,当您在ooc模块上运行实现时出现错误,您需要在ooc模块内实例化缓冲区。顶级综合通常会推断所有顶级端口上的IO缓冲区。
但是,如果在OOC模块中专门实例化IO缓冲区,则必须逐个端口地关闭顶层综合中的IO缓冲区插入。 对于Vivado综合,执行此操作的属性是BUFFER_TYPE。 有关BUFFER_TYPE qplease的更多信息,请参阅Vivado Design Suite用户指南:综合(UG901)。谢谢,Deepika。 谢谢,迪皮卡.---------------------------------------------- ---------------------------------------------- Google之前的问题 张贴。 如果某人的帖子回答了您的问题,请将帖子标记为“接受为解决方案”。 如果你看到一个特别好的和信息丰富的帖子,考虑给它Kudos(左边的明星) 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 Hi Pat, As the error comes up when you run implementation on ooc module, you need to instantiate buffers inside the ooc module. The top level synthesis will typically infer IO buffers on all top level ports. However, if IO buffers are specifically instantiated in an OOC module, you must turn off IO buffer insertion in the top-level synthesis on a port-by-port basis. For Vivado synthesis, the attribute to do this is BUFFER_TYPE. For more information on BUFFER_TYPE qplease refer to the Vivado Design Suite User Guide: Synthesis (UG901). Thanks, Deepika.Thanks, Deepika. -------------------------------------------------------------------------------------------- Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)View solution in original post |
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嗨Pat,
原始IBUFDS_GTE2原语需要在I和IB引脚上插入IBUF才能正确放置。 在您的情况下,因为您已将模块设置为OOC,所以合成将不会在模块端口上插入IBUF,从而导致错误。 您需要在HDL中实例化IBUF,使其看起来如下所示。 谢谢, 迪皮卡。 谢谢,迪皮卡.---------------------------------------------- ---------------------------------------------- Google之前的问题 张贴。 如果某人的帖子回答了您的问题,请将帖子标记为“接受为解决方案”。 如果你看到一个特别好的和信息丰富的帖子,考虑给它Kudos(左边的明星) 以上来自于谷歌翻译 以下为原文 Hi Pat, The primitive IBUFDS_GTE2 primitive needs IBUF inserted on the I and IB pins for it to be properly placed. In your case as you have set the module as OOC the synthesis will not insert IBUF on the module ports and hence the error. You need to instantiate IBUF in th HDL so that it looks like below. Thanks, Deepika. Thanks, Deepika. -------------------------------------------------------------------------------------------- Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left) |
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嗨,Pat,当您在ooc模块上运行实现时出现错误,您需要在ooc模块内实例化缓冲区。顶级综合通常会推断所有顶级端口上的IO缓冲区。
但是,如果在OOC模块中专门实例化IO缓冲区,则必须逐个端口地关闭顶层综合中的IO缓冲区插入。 对于Vivado综合,执行此操作的属性是BUFFER_TYPE。 有关BUFFER_TYPE qplease的更多信息,请参阅Vivado Design Suite用户指南:综合(UG901)。谢谢,Deepika。 谢谢,迪皮卡.---------------------------------------------- ---------------------------------------------- Google之前的问题 张贴。 如果某人的帖子回答了您的问题,请将帖子标记为“接受为解决方案”。 如果你看到一个特别好的和信息丰富的帖子,考虑给它Kudos(左边的明星) 以上来自于谷歌翻译 以下为原文 Hi Pat, As the error comes up when you run implementation on ooc module, you need to instantiate buffers inside the ooc module. The top level synthesis will typically infer IO buffers on all top level ports. However, if IO buffers are specifically instantiated in an OOC module, you must turn off IO buffer insertion in the top-level synthesis on a port-by-port basis. For Vivado synthesis, the attribute to do this is BUFFER_TYPE. For more information on BUFFER_TYPE qplease refer to the Vivado Design Suite User Guide: Synthesis (UG901). Thanks, Deepika.Thanks, Deepika. -------------------------------------------------------------------------------------------- Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left) |
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