如何在XPS中使用axi_hwicap的描述？

嗨Abderrahim;
我相信你会查看LogiCore IP AXI HWICAP，请访问：http：//www.xilinx.com/support/documentation/ip_documentation/axi_hwicap/v2_02_a/ds817_axi_hwicap.pdf
有关描述，最好的地方是查找与部分重新配置相关的教程，例如“处理器外围设备教程的部分重新配置”中的教程：http：//www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/
PlanAhead_Tutorial_Reconfigurable_Processor.pdf
这为您提供了有关eos_in的信息，以便在第12页中说明：“请注意，axi_hwicap_0实例上有EOS_IN端口。此端口可供设计人员连接到单独的信号，该信号只有在
系统稳定并且可以完成重新配置，以处理在系统稳定之前可能发出重新配置命令的情况。您可以通过选择配置参数实例化STARTUP原语来实例化STARTUP块并正确并自动连接端口。
hwicap pcore配置GUI中的HWICAP核心选项。“
“1.选择总线接口选项卡。
2.双击axi_hwicap_0实例，然后单击User选项卡中HWICAP core选项中的实例化STARTUP原语复选框。
单击“确定”接受设置。
选择Ports选项卡，观察EOS_IN端口未列出，因为它连接到STARTUP块，该块自动使用所选选项进行实例化。“
如果上述教程不够，xilinx论坛中还有更多链接和信息。
您可能还想了解有关启动原语的更多信息。
希望这会很有用，
问候，



以下为原文

Hi Abderrahim;
 
 I am sure you looked into the LogiCore IP AXI HWICAP in http://www.xilinx.com/support/documentation/ip_documentation/axi_hwicap/v2_02_a/ds817_axi_hwicap.pdf
 
For a description, the best place is to look for tutorials related to partial reconfiguration, such as the one here "Partial Reconfiguration of a Processor Peripheral Tutorial" : http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/PlanAhead_Tutorial_Reconfigurable_Processor.pdf
 
This gives you information about the eos_in as well such that in page 12, it states: "Notice that there is EOS_IN port on the axi_hwicap_0 instance. This port is available for the designer to connect to a separate signal that can be asserted only when the system is stable and the reconfiguration can be done, to take care of a situation where reconfiguration command may be issued before the system is stable. You can instantiate a STARTUP block and connect the port correctly and automatically by selecting configuration parameter instantiate STARTUP primitive in the HWICAP core option in the hwicap pcore configuration GUI."
 
"1. Select the Bus Interfaces tab.
2. Double-click on the axi_hwicap_0 instance and click on the check box of instantiate STARTUP primitive in the HWICAP core option in the User tab.
3. Click OK to accept the settings.
4. Select the Ports tab and observe that EOS_IN port is not listed as it is connected to STARTUP block which is automatically instantiated with the selected option."
 
If the tutorial above is not enough, there are many more links and information in the xilinx forums. You might also want to know more about the startup primitives. 
 
Hopefully this would be useful, 
 
Regards, 
 

亲爱的airturk，
非常感谢你的回答，
我没有使用PlanAhead的经验，但我会尝试做你在上一个答案中发送的例子。
在我要使用的实际软件示例中，我有一个以太网连接（lwip），并且每个以太网我将发送一个比特流到在Spartan 6上运行的Microblaze。
1  - 如何将Bitstream从Externel DDR2传输到axi_hwicap？
有关于如何做到这一点的描述？
2  -  Microblaze不应该将转移的比特流直接写入Flash，这是正确的吗？
（对于安全模式，例如在编程Flash时电源已关闭）？
我在这张图片中连接了硬件，这是正确的吗？
非常感谢你的重播。
Abderrahim29



以下为原文

Dear airturk,
many thanks for your Answer,
I have no experience with PlanAhead, but i will try to do the Example, that you sent in the last Answer.
In the actuall Software Example, that i will to use, i have a Ethernet connection (lwip), and per Ethernet i will sent a Bitstream to the Microblaze running on a Spartan 6.
1 - How can i transfer the Bitstream from the Externel DDR2 to the axi_hwicap? Is there a Description on howto do this?
2 - Microblaze should not write the transfered Bitstream direktly to the Flash, is this correct? (For The safe Mode, e.g. in Case of Power is down while programming Flash)?
I have connected the Hardware in this Picture, is this correct?
 
Many thanks for your Replay.
Abderrahim29