Placer无法创建RPM

您是否正在使用MIG核心生成器为DDR控制器/接口构建MCB？
如果是这样，您如何指定DRAM接口引脚位置？
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
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以下为原文

Are you using the MIG core generator to build a MCB for your DDR controller/interface?
 
If so, how have you designated the DRAM interface pin locations?
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

鲍勃你好，
不，我没有使用MIG来构建DDR控制器。
我使用自己的DDR控制器设计，因此我不限于使用Xilinx推荐的PIN位置。
我在Bank1的下半部分有16DQ引脚和2个DQS选通，而在Bank1的下半部分有16个DQ引脚和2DQS stobes。



以下为原文

Hello Bob,
No I am not using MIG to build DDR controller. I am using our own DDR controller design, so I am not restricted to use the PIN locations recomonded by Xilinx. I have 16 DQ pins and 2 DQS strobe in  Top Half of Bank 1 and rest 16 DQ pins and 2 DQS stobes in Bottom Half of Bank1.

免责声明：我不为Xilinx工作，而且我不是ISE或S6'大师'。
直到有人知情的答案，这是我的建议：
1.直到最近，Spartan6的时钟引脚分配规则“未被记录”。
如果您的放置'问题'与时钟生成和分配系统有任何关系（特别是关于IO区域中的ISERDES / OSERDES和DDR功能），您应该查阅最新版本的UG382。
在此修订版中，有大量添加的内容解释了引脚布局和布线基础结构。
2.取消冻结和取消分组您的RPM。
让映射器工具在映射和放置单个单元和引脚方面有所作为，并查看具有竞争力的无约束设计是否将映射，放置和布线。
这使您可以确信您的基本设计可以实现，这使您可以将设计和布局问题彼此分开。
您已经知道当前的设计（包括放置限制）'不起作用'。
达到“有效”的程度，然后逐步回到原来的位置。
从可路由的“解决方案”开始，解决问题的出现。
由于我不熟悉你的设计或背景，我可能做出了完全没有根据的假设。
如果是这种情况，我的意思是没有侮辱，请接受我的道歉。
鉴于我对Spartan 6目前的理解有多少，这些是我在你所描述的问题上采取的步骤。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

Disclaimer:  I don't work for Xilinx, and I'm not an ISE or S6 'guru'.
Until someone knowledgeable answers, here are my suggestions:
 
1.  Up until recently, the clock pin assignment rules for Spartan6 were 'under-documented'.  If your placement 'issues' are in any way related to the clock generation and distribution system (particularly with respect to the ISERDES/OSERDES and DDR functions in the IO region), you should consult the latest revision of UG382.  There is considerable amount of added content, in this revision, explaining pin placement and routing infrastructure.
 
2.  Un-freeze and un-group your RPMs. Let the mapper tool have its way in mapping and placing the individual cells and pins, and see if the competely unconstrained design will map, place, and route.  This gives you confidence that your basic design can be achieved, and this allows you to separate the issues of design and placement from one another.  You already know that the current design (including placement restrictions) 'doesn't work'.  Get to a point that 'does work', and then work your way back to your original placement in steps.  Work through the issues as they arise, starting from a routable 'solution'.
 
Since I am not familiar with your design or your background, I may have made assumptions which are completely unfounded.  If this is the case, I meant no insult, and please accept my apologies.  Given how little I understand about Spartan 6 at this time, these are the steps I would take to work forward on the problem as you've described it.
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

你好，
我也有同样的问题...
你解决了吗？
任何指南？
问候，
Lefteris



以下为原文

Hello,
 
I have the same problem...
 
Do you solve it?
 
Any guideline?
 
regards,
Lefteris