哪些FPGA引脚应连接到GPS串行接口？

您使用的是已经设计和制造的电路板吗？
如果您正在设计新电路板，那么ISE将很乐意自动为这些信号分配引脚。
如果您有首选项，则可以覆盖引脚分配，但ISE的分配通常与进行随机选择一样好或更好。
- 鲍勃埃尔金德
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以下为原文

Are you using a board that has already been designed and built?
 
If you are designing a new board, then ISE will be happy to assign pins for these signals automatically.  You can override the pin assignments if you have a preference, but the assignment by ISE is usually as good or better than making a random choice.
 
- Bob Elkind
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谢谢
我正在使用现有的董事会。
费萨尔



以下为原文

Thanks
 
I am using an existing board.
 
Faisal

串行I / O引脚是否已连接在电路板上？
或者您是否会从FPGA封装到串口添加电路板？
如果电路板已经在串行端口和FPGA之间连接了信号，则引脚选择已经完成。
如果您要将FPGA封装的导线焊接到串行端口，那么您必须问自己哪些未使用的FPGA用户I / O引脚最易于焊接。
例如：
1.电路板设计人员有先见之明将一些原本未使用的FPGA IO引脚连接到一个接头，或者在FPGA封装尺寸之外连接大型过孔。
因此，这些IO引脚易于探测或添加导线连接。
2.没有备用FPGA IO引脚引出电路板上的接入点。
FPGA封装是一个四方扁平封装。
对于焊接，最易接近的引脚位于封装的角落。
如果8个角销中的任何一个是未使用的IO，则这些是焊线的最佳选择。
3. FPGA封装是一个四方扁平封装，但没有好的角销。
是否有几个未使用的相邻引脚？
如果您有2个或更多相邻的未使用引脚（可以是用户IO），请使用其中一个引脚进行新的信号连接。
将导线焊接到2个或更多相邻扁平封装引脚比将导线焊接到单个扁平封装封装引脚要容易得多，并且焊接连接将更加坚固。
4.球栅阵列封装。
这是最艰难的情况。
希望电路板设计人员使用“完整”的BGA逃逸模式，以便即使未使用的“pns”也可以通过电路板上的过孔。
过孔将非常小，但是一个有才华的返工技术可以将电线焊接到这些过孔中的一个。
如果您发现自己处于场景＃4中，那么您很快就会在市场上进行电路板布局修订。
希望这可以帮助。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
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以下为原文

Are the serial I/O pins already connected on the circuit board?
 
Or will you be adding wires to the board from the FPGA package to the serial port?
 
If the circuit board already has the signals connected between the serial port and the FPGA, the pin selection has already been done.
 
If you will be soldering wires from the FPGA package to the serial port, then you must ask yourself which unused FPGA user I/O pins are most easily accessible for soldering.  For example:
 
1.  The circuit board designer had the foresight to connect some otherwise unused FPGA IO pins to a header, or large vias outside the FPGA package footprint.  These IO pins are therefore readily accessible for probing or for adding wire connections.
 
2.  There are no spare FPGA IO pins brought out to access points on the board.  The FPGA package is a quad flatpack.  For soldering, the most accessible pins are on the corners of the package.  If any of the 8 corner pins are unused IOs, these are your best choices for soldering wires.
 
3.  FPGA package is a quad flatpack, but there are no good corner pins available.  Are there several adjacent pins which are unused?  If you have 2 or more adjacent unused pins which can be user IOs, use one of those pins for your new signal connection.  It is much easier to solder a wire to 2 or more adjacent flatpack package pins than it is to solder a wire to a single flatpack package pin, and the solder connection will be much sturdier.
 
4.  Ball grid array package.  This is the toughest scenario of all.  Hopefully the circuit board designer used a 'full' BGA escape pattern, so that even unused "pns" were brought to vias on the board.  The vias will be horribly tiny, but a talented rework tech can solder a wire to one of these vias.
 
If you find yourself in scenario #4, you're in the market for a board layout revision sooner rather than later.
 
Hope this helps.
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

GPS设备的Vcc和GND引脚必须精确连接到地和电源电压。
查看GPS文档，了解所需的电压。
关于Tx和Rx  - 它取决于GPS设备的信号电平。
如果它是RS232，你将需要一个收发器芯片（例如MAX232或类似产品 - 如果你使用的是某种类型的评估板，它可能已经有板载芯片），而在FPGA和GPS之间，例如
TTL电平信号可以直接连接。
否则只需将信号连接到FPGA上的任何空闲I / O引脚即可。
FPGA的编程取决于您需要从GPS流中提取多少信息，以及您是否希望以后能够在没有太多额外工作的情况下更换GPS设备。
在VHDL中对简单的解析器进行硬编码应该不难，但也可以使用Pico或MicroBlaze，这可能会使事情变得更容易和更灵活。
如果你选择MicroBlaze处理器，你可以使用大量现有的C / C ++ NMEA库。



以下为原文

The Vcc and GND pins of the GPS device nede to be connected to exactly that - ground and a supply voltage. Have a look at the GPS documentation to see what voltage is required.
 
With regard to Tx and Rx - it depends on the signal level of the GPS device. If it's RS232, you will need a transceiver chip (such as a MAX232 or similar - if you're using an evaluation board of some sort, it may already have such a chip onboard) in between the FPGA and the GPS, whereas for instance TTL level signals can be connected directly. Otherwise just connect the signals to whatever free I/O pins you have on the FPGA.
 
The programming of the FPGA depends on how much information you need to extract from the GPS stream, and whether you want to be able to change GPS device later on without too much extra work. It shouldn't be difficult to hardcode a simple parser in VHDL, but alternatively you can also use a Pico- or MicroBlaze, which might make things a bit easier and more flexible. If you go for the MicroBlaze processor, there should be plenty of existing NMEA libraries for C/C++ out there you can use.

非常感谢。
真的很感谢你的帮助。
这些picoblaze处理器是与spartan 3还是Seperate组件集成的？
谢谢＆amp;
问候
费萨尔



以下为原文

Many Thanks. Really appreciate all your help.
 
Do these picoblaze processor is integarted with spartan 3 or  Seperate component ?
 
Thanks & Regards
 
Faisal

PicoBlaze是一款软核8位处理器，采用LUT和Block RAM构建而成。
有一个专门用于PicoBlaze的PicoBlaze Xilinx用户社区论坛。
从PicoBlaze Lounge下载更多信息，设计文件。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
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以下为原文

PicoBlaze is a soft-core 8bit processor built from LUTs and a Block RAM.  There is a PicoBlaze Xilinx User Community Forum dedicated to PicoBlaze.
 
Download more info, design files from the PicoBlaze Lounge.
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.