是否可以使用图形块来连接不同模块的VHDL文件

嗨，
如果您在ISE中引用原理图编辑器，则在VIvado中没有它。
http://forums.xilinx.com/t5/Design-Entry/Schematic-Design-Entry-Tool-in-Vivado/td-p/278260
有关Vivado设计输入方法，请参阅下面的UG
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_3/ug895-vivado-system-level-design-entry.pdf
您还可以使用IPI中的块在Vivado中构建系统。
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_4/ug994-vivado-ip-subsystems.pdf
希望这可以帮助
问候，
Vanitha
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在原帖中查看解决方案



以下为原文

Hi,
 
If you are referring Schematic Editor like in ISE you don't have it in VIvado.
http://forums.xilinx.com/t5/Design-Entry/Schematic-Design-Entry-Tool-in-Vivado/td-p/278260
 
For Vivado design entry method please refer below UG
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_3/ug895-vivado-system-level-design-entry.pdf
 
You can also  build a System in Vivado using blocks in IPI.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_4/ug994-vivado-ip-subsystems.pdf
 
 
Hope this helps
 
Regards,
Vanitha
---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
View solution in original post

嗨，
如果您在ISE中引用原理图编辑器，则在VIvado中没有它。
http://forums.xilinx.com/t5/Design-Entry/Schematic-Design-Entry-Tool-in-Vivado/td-p/278260
有关Vivado设计输入方法，请参阅下面的UG
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_3/ug895-vivado-system-level-design-entry.pdf
您还可以使用IPI中的块在Vivado中构建系统。
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_4/ug994-vivado-ip-subsystems.pdf
希望这可以帮助
问候，
Vanitha
--------------------------------------------------
-------------------------------------------请在发布前进行谷歌搜索，
您可能会找到相关信息。请留下帖子 - “接受为解决方案”，如果提供的信息有用且回复，请给予赞誉



以下为原文

Hi,
 
If you are referring Schematic Editor like in ISE you don't have it in VIvado.
http://forums.xilinx.com/t5/Design-Entry/Schematic-Design-Entry-Tool-in-Vivado/td-p/278260
 
For Vivado design entry method please refer below UG
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2012_3/ug895-vivado-system-level-design-entry.pdf
 
You can also  build a System in Vivado using blocks in IPI.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_4/ug994-vivado-ip-subsystems.pdf
 
 
Hope this helps
 
Regards,
Vanitha
---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented