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我使用了“保持”约束来防止10个信号从Synthesis中移除,但是在合成之后仍然缺少一个信号。
有一个解决方案可以解决上述问题,但我不知道应该使用哪种“S”约束。 http://www.xilinx.com/support/answers/34258.htm 请让我知道“S”限制的答案,以防止删除信号。 非常感谢。 以上来自于谷歌翻译 以下为原文 I have used "keep" constraints to prevent 10 signals from removing from Synthesis, but one signal is still missing after Synthesis. There is a solution for fixing above problem but I have no idea which "S" constraints I should use. http://www.xilinx.com/support/answers/34258.htm Please let me know the answer for "S" constraints to prevent from removing signals. Many thanks. |
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3个回答
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嗨,
这里“S”约束指的是Save约束。 如果应用Xilinx Save约束,则保留Net和连接到网络的所有逻辑(驱动程序或负载)。 有关保存约束的更多信息,您可以阅读以下用户指南UG625http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_4/cgd.pdfat第245-246页 仅供参考:要了解KEEP和S约束之间的区别,您可以浏览以下答案记录35504 http://www.xilinx.com/support/answers/35504.htm 问候, 赛义德 -------------------------------------------------- -------------------------------------------请注意 - 请标记答案 如果提供的信息有用,请“接受为解决方案”。给予您认为有用并回复导向的帖子。感谢Kudos .------------------------ -------------------------------------------------- ------------------- 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 Hi, Here the "S" constraint refers to Save constraint. If a Xilinx Save constraint is applied then Net and all the logic connected to the net(drivers or load) is retained. For more information on Save constraint you can go through the following user guide UG625 http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_4/cgd.pdf at page number 245-246 FYI: To know the difference between KEEP and S constraint you can go through the following Answer record 35504 http://www.xilinx.com/support/answers/35504.htm Regards, Syed --------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------View solution in original post |
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嗨,
这里“S”约束指的是Save约束。 如果应用Xilinx Save约束,则保留Net和连接到网络的所有逻辑(驱动程序或负载)。 有关保存约束的更多信息,您可以阅读以下用户指南UG625http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_4/cgd.pdfat第245-246页 仅供参考:要了解KEEP和S约束之间的区别,您可以浏览以下答案记录35504 http://www.xilinx.com/support/answers/35504.htm 问候, 赛义德 -------------------------------------------------- -------------------------------------------请注意 - 请标记答案 如果提供的信息有用,请“接受为解决方案”。给予您认为有用并回复导向的帖子。感谢Kudos .------------------------ -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 Hi, Here the "S" constraint refers to Save constraint. If a Xilinx Save constraint is applied then Net and all the logic connected to the net(drivers or load) is retained. For more information on Save constraint you can go through the following user guide UG625 http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_4/cgd.pdf at page number 245-246 FYI: To know the difference between KEEP and S constraint you can go through the following Answer record 35504 http://www.xilinx.com/support/answers/35504.htm Regards, Syed --------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. --------------------------------------------------------------------------------------------- |
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