完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
嗨..我是Vivado的新手。
在Sysgen中使用generate选项时,得到了错误 Sysgen许可证签出失败.XILINXD_LICENSE_FILE = D:/Vivado/2014.2/data/sysgen/hwcosim_compiler/pp_ethernetEnvironment变量LM_LICENSE_FILE未设置。许可证搜索路径:C:。Xilinx; D: Vivado 2014.2 data sysgen hwcosim_compiler pp_ethernet; d: Vivado 2014.2 数据 ipcore_licenses 我正在使用Zed板。 请帮我解决这个问题。 先谢谢你.. 以上来自于谷歌翻译 以下为原文 Hi.. I am new to Vivado. When using generate option in Sysgen , got the error Sysgen license checkout failed. XILINXD_LICENSE_FILE = D:/Vivado/2014.2/data/sysgen/hwcosim_compiler/pp_ethernet Environment variable LM_LICENSE_FILE is not set. License search path: C:.Xilinx;D:Vivado2014.2datasysgenhwcosim_compilerpp_ethernet;D:Vivado2014.2dataipcore_licenses I am using Zed board. Please help me to solve this. Thank you in advance.. |
|
相关推荐
6个回答
|
|
你好@ girigkec,
您能否在vivado Tcl控制台中共享您的许可文件和以下命令的输出 - report_environment -file /xinfo.txt 问候,阿希什----------------------------------------------- - - - - - - - - - - - - - - - - - - - - - - - -请注意- 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。感谢Kudos .-------------------- -------------------------------------------------- ------------------------ 以上来自于谷歌翻译 以下为原文 Hello @girigkec, Can you share your license file and output of below command in vivado Tcl console - report_environment -file Regards, Ashish ---------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------- |
|
|
|
谢谢你的回复..
tcl报告:错误:常见的17-37,其中要写入的文件xinfo.txtis不存在的目录。 我无法在文件夹中找到许可证文件。 以上来自于谷歌翻译 以下为原文 Thank u for the response.. tcl reported : ERROR : common 17-37, directory in which file xinfo.txtis to be written does not exist.. I am not able to find licence file in the folder. |
|
|
|
我可以找到这个许可证文件..
Xilinx_IP.lic 1 KB 以上来自于谷歌翻译 以下为原文 I could find this licence file.. |
|
|
|
你好@ girigkec,
您需要使用有效目录替换命令中提到的内容,例如'C: Xilinx Vivado 2016.2' 否则只需输入命令:report_environment -file xinfo.txt 在这种情况下,将在当前工作目录(pwd)中生成文件 问候,阿希什----------------------------------------------- - - - - - - - - - - - - - - - - - - - - - - - -请注意- 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。感谢Kudos .-------------------- -------------------------------------------------- ------------------------ 以上来自于谷歌翻译 以下为原文 Hello @girigkec, You need to replace Else just type the command : report_environment -file xinfo.txt In this case, file will be generated in present working directory (pwd) Regards, Ashish ---------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------- |
|
|
|
嗨@ girigkec,
如果你查看下面的链接,只是我之前的帖子的补充 http://www.xilinx.com/products/design-tools/vivado.html#buy 您可以找到使用System Generator for DSP功能,您需要拥有Vivado System Edition许可证或免费30天评估许可证。 问候,阿希什----------------------------------------------- - - - - - - - - - - - - - - - - - - - - - - - -请注意- 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。感谢Kudos .-------------------- -------------------------------------------------- ------------------------ 以上来自于谷歌翻译 以下为原文 Hi @girigkec, Just an addition to my earlier post, if you check below link http://www.xilinx.com/products/design-tools/vivado.html#buy You can find that to use System Generator for DSP feature, you need to have either Vivado System Edition License or Free 30-day Evaluation License. Regards, Ashish ---------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------- |
|
|
|
请查看这些ARshttp://www.xilinx.com/support/answers/44617.htmlhttp://www.xilinx.com/support/answers/33770.htmlhttp://www.xilinx.com/support/answers/41563。
htmlhttp://www.xilinx.com/support/answers/55830.html 谢谢和RegardsBalkrishan ----------------------------------------------- ---------------------------------------------请将帖子标记为 一个答案“接受为解决方案”,以防它有助于解决您的查询。如果一个帖子引导到解决方案,请给予赞誉。 以上来自于谷歌翻译 以下为原文 check these ARs http://www.xilinx.com/support/answers/44617.html http://www.xilinx.com/support/answers/33770.html http://www.xilinx.com/support/answers/41563.html http://www.xilinx.com/support/answers/55830.htmlThanks and Regards Balkrishan -------------------------------------------------------------------------------------------- Please mark the post as an answer "Accept as solution" in case it helped resolve your query. Give kudos in case a post in case it guided to the solution. |
|
|
|
只有小组成员才能发言,加入小组>>
2288 浏览 7 评论
2699 浏览 4 评论
Spartan 3-AN时钟和VHDL让ISE合成时出现错误该怎么办?
2183 浏览 9 评论
3258 浏览 0 评论
如何在RTL或xilinx spartan fpga的约束文件中插入1.56ns延迟缓冲区?
2326 浏览 15 评论
有输入,但是LVDS_25的FPGA内部接收不到数据,为什么?
592浏览 1评论
1654浏览 1评论
157浏览 1评论
在使用xc5vsx95T时JTAG扫片不成功,测量TDO无信号输出
2308浏览 0评论
627浏览 0评论
小黑屋| 手机版| Archiver| 电子发烧友 ( 湘ICP备2023018690号 )
GMT+8, 2024-8-30 03:28 , Processed in 1.702707 second(s), Total 89, Slave 72 queries .
Powered by 电子发烧友网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
电子发烧友观察
版权所有 © 湖南华秋数字科技有限公司
电子发烧友 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191