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- 工具:VIVADO 2017.1
- IP名称:AXI Quad SPI - 目标设备:Artix 7 - 消息:[放置30-73]寄存器'dsp / Load_Database / load_database_spi_interface / U0 / NO_DUAL_QUAD_MODE.QSPI_NORMAL / IO0_I_REG'的约束无效。 它具有属性IOB = TRUE,但它不是由任何IO元素驱动或驱动的。 我将“AXI Quad SPI”的xilinx IP用于FPGA和MPU之间的接口。 在实施过程中,即使在我将IO0_I_REG更改为“TRUE”之后,每次都会发生批评性消息[Place 30-73]。 我怎么解决这个问题? 谢谢。 以上来自于谷歌翻译 以下为原文 - Tool : VIVADO 2017.1 - IP Name : AXI Quad SPI - Target Device : Artix 7 - Message : [Place 30-73] Invalid constraint on register 'dsp/Load_Database/load_database_spi_interface/U0/NO_DUAL_QUAD_MODE.QSPI_NORMAL/IO0_I_REG'. It has the property IOB=TRUE, but it is not driving or driven by any IO element. I made a use of the xilinx IP of "AXI Quad SPI" for the interface between FPGA and MPU. During the implementation process, the critial message [Place 30-73] occurs every time even after I changed the IO0_I_REG to "TRUE". How can I solve this problem? Thank you. |
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3个回答
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@ swseo83IO0是MOSI(IIRC),所以从技术上讲,你可以将其短接到IO0_O信号。
问题是IOB = TRUE因此将其设为false应该会使问题消失。 - 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 @swseo83 IO0 is MOSI (IIRC) so technically you can just short it to IO0_O signal. The problem is that IOB=TRUE so making it false should make the problem go away too. - Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented.View solution in original post |
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@ swseo83,
根据消息,打开合成设计并检查连接 DSP / Load_Database / load_database_spi_interface / U0 / NO_DUAL_QUAD_MODE.QSPI_NORMAL / IO0_I_REG 该寄存器应具有与IO元素的专用连接以遵守IOB属性。 --Syed -------------------------------------------------- -------------------------------------------请注意 - 请标记答案 如果提供的信息有用,请“接受为解决方案”。给予您认为有用并回复导向的帖子。感谢Kudos .------------------------ -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 @swseo83, As per the message, open the synthesized design and check the connections of dsp/Load_Database/load_database_spi_interface/U0/NO_DUAL_QUAD_MODE.QSPI_NORMAL/IO0_I_REG The register should have a dedicated connection to IO element to adhere to IOB property. --Syed --------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. --------------------------------------------------------------------------------------------- |
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@ swseo83IO0是MOSI(IIRC),所以从技术上讲,你可以将其短接到IO0_O信号。
问题是IOB = TRUE因此将其设为false应该会使问题消失。 - 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用且回复的帖子。 以上来自于谷歌翻译 以下为原文 @swseo83 IO0 is MOSI (IIRC) so technically you can just short it to IO0_O signal. The problem is that IOB=TRUE so making it false should make the problem go away too. - Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. |
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