设计没有满足时间警告PAR 468

macellan85，
你能发布完整的PAR：468消息吗？
您要定位的设备的部件号是多少？
您使用的工具版本是什么？
谢谢，
山姆
不要忘记回复，kudo，并接受解决方案.Xilinx视频设计中心



以下为原文

macellan85,
 
Can you post the full PAR:468  message?
What is the part number of the device that you are targeting?
What is the tool version that you are using?
 
Thank you,
Sam
Don't forget to reply, kudo, and accept as solution.

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嘿@ samk
这是警告标签上的唯一消息：
警告：参数：468  - 您的设计不符合时间要求。
以下是一些帮助您满足设计时间的建议。
我还附上了完整的控制台消息
设备是AES220B斯巴达3AN板
XC3S400AN / ftg256 /速度等级-5
我在Ubuntu 16.04上使用ISE 14.7
谢谢
Console.txt 48 KB



以下为原文

 
Hey @samk
 
 
This is the only message on warning tab:
WARNING:Par:468 - Your design did not meet timing. The following are some suggestions to assist you to meet timing in
your design.
 
Also I' ve attached the complete console messages
 
Device is AES220B spartan 3AN board
XC3S400AN / ftg256 / speed grade -5
 
I' m using ISE 14.7 on Ubuntu 16.04 
 
Thank you
 
            Console.txt ‏48 KB

@ macellan85
我看到PAR的建议：468位于控制台输出中。
使用Timing Analyzer查看时序报告（在ISE中选择“Post-Place＆amp; Route Static Timing Report”）。
转到失败的约束并评估每个约束的失败路径。尝试设计目标和时间性能策略（在ISE中选择项目 - >设计目标和策略）以确保在工具中设置最佳选项
时序收敛。使用Xilinx“SmartXplorer”脚本尝试已知的特殊选项组合，以产生非常好的结果。访问Xilinx技术支持网站http://support.xilinx.com并转到“疑难解答 - >技术提示 -
>时间和约束“或”TechXclusives->时间关闭“，以获得满足设计时间的提示和建议。未应用的时间约束数量：约束前面的1个星号（*）表示未满足。
这可能是由于设置或保留违规造成的。
时间报告是关闭时间的好资源。
它应该有助于强调项目失败的原因。
萨姆
不要忘记回复，kudo，并接受解决方案.Xilinx视频设计中心



以下为原文

@macellan85
 
I see the suggestions for PAR:468 are located in the console output.
 
Review the timing report using Timing Analyzer (In ISE select "Post-Place &
   Route Static Timing Report"). Go to the failing constraint(s) and evaluate the failing paths for each constraint.

Try the Design Goal and Strategies for Timing Performance(In ISE select Project -> Design Goals & Strategies) to
   ensure the best options are set in the tools for timing closure.

 Use the Xilinx "SmartXplorer" script to try special combinations of
   options known to produce very good results.

Visit the Xilinx technical support web at http://support.xilinx.com and go to
   either "Troubleshoot->Tech Tips->Timing & Constraints" or "
   TechXclusives->Timing Closure" for tips and suggestions for meeting timing
   in your design.


Number of Timing Constraints that were not applied: 1

Asterisk (*) preceding a constraint indicates it was not met.
   This may be due to a setup or hold violation.
 
The timing report is a good resource for closing timing. It should help highlight the reason that the project is failing timing.
 
-Sam
Don't forget to reply, kudo, and accept as solution.

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