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映射错误866:没有足够的有效站点来放置以下IOB

我正在使用带有Spartan-6 150T FG484的ISE 14.2嵌入式版本。
我的设计包含一个MicroBlaze处理器。
我从SP605板开始使用原型设计,并使用更大的设备转换为我的真实设计。
我小心更新所有设备引用以使用更大的150T设备。
SP605使用LVCMOS25,而我的电路板使用LVCMOS33。
我用我的所有信号填写了我的UCF文件,但只有一些导致了错误。
这是我从Map获得的错误:
信息:位置:834  - 仅锁定IO的子集。
在92个IO中,89个被锁定,3个未被锁定。
以下是未锁定的组件列表。
OA_o_SYS_OK未锁定OA_o_HP_INHIBIT未锁定OA_o_ATTENUAtiON_EN未锁定其余IO已锁定错误:放置:866  - 没有足够的有效站点放置以下IOB:IO标准:名称= LVCMOS25,VREF = NR,VCCO = 2.50,TERM = NONE,
DIR = OUTPUT,DRIVE_STR = 12 OA_o_SYS_OK OA_o_HP_INHIBIT OA_o_ATTENUATION_EN这可能是由于设备上可用站点数量不足,禁止站点过多,或者I / O标准不兼容,或者范围受限于具有有效站点的I / O Bank。
这种情况可以通过以下一个(或全部)动作来解决:a)通过使用LOC或范围约束将类似标准的IOB分组到最小量的I / O Bank中。
b)如果可能,通过选择较低容量的I / O Bank,为特殊IOB最大化可用的I / O Bank资源。
c)如果适用,减少用户禁止站点的数量或使用更大的设备。
以下是我的UCF文件中的相应条目:
NET OA_o_SYS_OK LOC =“B20”|
IOSTANDARD =“LVCMOS33”;
NET OA_o_HP_INHIBIT LOC =“F22”|
IOSTANDARD =“LVCMOS33”; NET OA_o_ATTENUATION_EN LOC =“J20”|
IOSTANDARD =“LVCMOS33”;
你可以看到我确实有这些LOCKED。
在我的MHS文件中:
端点OA_o_ATTENUATION_EN = OA_o_ATTENUATION_EN,DIR = OPORT OA_o_HP_INHIBIT = OA_o_HP_INHIBIT,DIR = OPORT OA_o_SYS_OK = OA_o_SYS_OK,DIR = O,SIGIS = NONE
我已经尝试将SYS_OK的IO引脚从B20交换到A20,其中A20位于不会出错的引脚上,但它仍然说SYS_OK没有锁定并给出完全相同的错误。
我甚至尝试删除SYS_OK,它名为OK,并用新名称SYS_OK添加回来,但我仍然得到同样的错误。
我还清理了设计文件并重新设计了干净的设计。
没有运气。
我从阅读中知道LVCMOS25是默认的,因此如果引脚被锁定,为什么它们会转到LVCMOS25。
我不明白的是为什么他们没有锁定。
知道这里发生了什么吗?
谢谢。

以上来自于谷歌翻译


以下为原文

I am using ISE 14.2 Embedded Edition with a Spartan-6 150T FG484.

My design contains a single MicroBlaze processor.

I started with a prototype design from an SP605 board and converted to my real design using the larger device.  I was careful to update all device references to use the larger 150T device.

The SP605 uses LVCMOS25 whereas my board with use LVCMOS33.

I filled in my UCF file with all my signals, but only some caused errors.

Here is the error I get from Map:
INFO:Place:834 - Only a subset of IOs are locked. Out of 92 IOs, 89 are locked
   and 3 are not locked.  The following is the list of components that are not
   locked.
   OA_o_SYS_OK      NOT LOCKED
   OA_o_HP_INHIBIT      NOT LOCKED
   OA_o_ATTENUATION_EN      NOT LOCKED
   Rest of the IOs are LOCKED

ERROR:Place:866 - Not enough valid sites to place the following IOBs:
   IO Standard: Name = LVCMOS25, VREF = NR, VCCO = 2.50, TERM = NONE, DIR =
   OUTPUT, DRIVE_STR = 12
       OA_o_SYS_OK
       OA_o_HP_INHIBIT
       OA_o_ATTENUATION_EN

   This may be due to either an insufficient number of sites available on the
   device, too many prohibited sites,
   or incompatible I/O Standards locked or range constrained to I/O Banks with
   valid sites.
       This situation could possibly be resolved by one (or all) of the
   following actions:
   a) Grouping IOBs of similar standards into a minimum amount of I/O Banks by
   using LOC or range constraints.
   b) Maximizing available I/O Banks resources for special IOBs by choosing
   lower capacity I/O Banks if possible.
   c) If applicable, decreasing the number of user prohibited sites or using a
   larger device.


And here are the corresponding entries in my UCF file:
NET OA_o_SYS_OK LOC = "B20" | IOSTANDARD = "LVCMOS33";

NET OA_o_HP_INHIBIT LOC = "F22" | IOSTANDARD = "LVCMOS33";

NET OA_o_ATTENUATION_EN LOC = "J20" | IOSTANDARD = "LVCMOS33";


You can see that I do in fact have these LOCKED.  

And in my MHS file:
PORT OA_o_ATTENUATION_EN = OA_o_ATTENUATION_EN, DIR = O
PORT OA_o_HP_INHIBIT = OA_o_HP_INHIBIT, DIR = O
PORT OA_o_SYS_OK = OA_o_SYS_OK, DIR = O, SIGIS = NONE


I have tried swapping IO pins for SYS_OK from B20 to A20 where A20 is on a pin that does not give errors, but it still says SYS_OK is not LOCKED and gives the exact same error.

I even tried removing SYS_OK which was orginally name OK and adding it back in with a new name SYS_OK and still I have get the same error.

I have also cleaned design files and rebuilt the design clean.  No luck.

I know from reading around that LVCMOS25 is the default so that makes sense as to why if the pins are LOCKED they go to LVCMOS25.  What I don't understand is why are they not LOCKED.

Any idea what is going on here?

Thanks.

回帖(11)

王立冕

2018-10-15 12:13:30
事实证明,这是ISE / EDK整合中处理约束的错误。
在一个相关的主题中,我发布了一个针对此问题的解决方法,这是我从Xilinx Webcase收到的。
另一个线程的解决方法
在原帖中查看解决方案

以上来自于谷歌翻译


以下为原文

It turns out this is a bug in ISE/EDK intergration dealing with contraints.
 
In a related thread I have posted a workaround for this issue I received from a Xilinx Webcase.
 
Workaround on Another Thread
 
 
View solution in original post
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刘飞

2018-10-15 12:32:57
通常这是写作的问题。
这些工具混淆了资本和非资本命名。
也许你成功地将信号重命名为总资本拼写 - 特别是在ucf中。

以上来自于谷歌翻译


以下为原文

Usually this is a problem of writing. The tools mix up capital and non capital naming. Maybe you succeed in rename the signals to total capital spelling - espacially in the ucf.
 
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杨玲

2018-10-15 12:43:11
为“未锁定”网络列出的属性都是默认值。
这似乎表明了这一点
ISE实际上并没有使用您的.ucf文件。
我要做的第一件事是尝试有意添加
.ucf文件的语法错误,以查看它是否被标记为错误。
如果没有,那么尝试删除
来自项目的.ucf文件并将其重新添加。
我见过.ucf文件在项目中但没有出现在层次结构中的情况
在顶级实例下。
通常只从项目中删除.ucf然后
添加它可以解决问题。
大多数情况下,如果您更改顶级问题,则会出现问题
模块。
-  Gabor
-  Gabor

以上来自于谷歌翻译


以下为原文

The attributes listed for the "un-locked" nets are all defaults.  This seems to indicate that
ISE is not actually using your .ucf file.  The first thing I would do is try to intentionally add
a syntax error to the .ucf file to see if it gets flagged as an error.  If not, then try to remove
the .ucf file from the project and add it back in.
 
I have seen cases where a .ucf file is in the project but does not show up in the hierarchy
under the top level instance.  Usually only removing the .ucf from the project and then
adding it back fixes the issue.  Most often the issue happens if you change the top-level
module.
 
-- Gabor
-- Gabor
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王立冕

2018-10-15 12:54:07
我在SYS_OK之前的NET上删除了一个分号,如下所示:
NET OA_o_HS_TX LOC =“A20”|
IOSTANDARD =“LVCMOS33”NET OA_o_SYS_OK LOC =“B20”|
IOSTANDARD =“LVCMOS33”;
它给了我以下翻译错误:
错误:ConstraintSystem:300  - 在文件中:C: Projects  Processor  HW / microblaze_pss.n cf(54):语法错误。
确保先前的约束规范以';'终止。
所以看起来它正在读取我的文件。
奇怪的是它在SYS_OK之后出现的HS_TX或NET没有问题,只有SYS_OK和我文件中的其他两个问题。
还有其他想法吗?
我接下来会尝试全部大写。

以上来自于谷歌翻译


以下为原文

I removed a semicolon on the NET right before the SYS_OK one as follows:
 
NET OA_o_HS_TX LOC = "A20"  | IOSTANDARD = "LVCMOS33"  

NET OA_o_SYS_OK LOC = "B20" | IOSTANDARD = "LVCMOS33";
 
It gave me the following Translate Error:
 
ERROR:ConstraintSystem:300 - In file:
   C:ProjectsProcessorHW/microblaze_pss.n
   cf(54): Syntax error.  Ensure that the previous constraint specification was
   terminated with ';'.
 
So it looks like it is reading my file.  It is just strange that it does not have a problem with the HS_TX or the NET that comes after SYS_OK, just SYS_OK and the other two further down in my file.
 
Any other thoughts? 
 
I will try ALL CAPS next.
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