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我的FPGA是xc3s1400a-4fg484,当我配置它时,问题就出现了。 程序与“'1'的信息相关联:程序已终止。完成没有变高。” 有人可以帮帮我吗? 影响信息: GUI ---自动连接电缆... AutoDetecting电缆。 请等待.PROGRESS_START - 开始操作。连接到电缆(U***端口 - USB21)。检查电缆驱动程序。驱动程序文件xu***_emb.sys found.Driver版本:src = 1029,dest = 1029.Driver windrvr6.sys version = 10.2.1.0。 WinDriver v10.21 Jungo(c)1997 - 2010建立日期:2010年8月31日X86 32位SYS 14:35:41,版本= 1021.Cable PID = 0008.枚举期间请求的最大电流为74 mA.Type = 0x0004.Cable Type = 3,修订版= 0.设置电缆速度为6 MHz。建立电缆连接。固件版本= 1303.文件版本C:/Xilinx/13.1/ISE_DS/ISE/data/xu***_xlp.hex = 1303.Firmware hex file version = 1303.PLD文件版本= 0012h.PLD版本= 0012h.PROGRESS_END - 结束Operation.Elapsed time = 0 sec.Type = 0x0004.ESN设备不适用于此电缆。试图识别边界扫描链配置中的设备.. .INFO:iMPACT - 当前时间:2015/4/9 8:54:46PROGRESS_START - 开始Operation.Identifing chain contents ...'0'::制造商的ID = Xilinx xc3s1400a,版本:2INFO:iMPACT:1777 - 阅读C: /Xilinx/13.1/ISE_DS/ISE/spartan3a/data/xc3s1400a.bsd...INFO:iMPACT:501 - '1':已成功添加设备xc3s1400a .---------------- -------------------------------------------------- ------ -------------------------------------------------- ------------------ done.PROGRESS_END - 结束Operation.Elapsed time = 0 sec.'1':加载文件'E:/ phase_array_mux / fpag_cpde / sub_board_zhang_150202_v1 / project / sub_board /***oard_top.bit'... done.INFO:iMPACT:2257 - 存储在内存中的比特流中的启动时钟已更改为“JtagClk”,但原始比特流文件保持不变。从比特流文件中读取的UserID = 0xFFFFFFFF.INFO :iMPACT:501 - '1':成功添加了设备xc3s1400a .------------------------------------ -------------------------------------------------- -------------------------------------------------- ----信息:iMPACT - 当前时间:2015/4/9 8:55:08PROGRESS_START - 启动操作。此设备链的最大TCK工作频率:10000000.Validating chain ...边界扫描链验证成功.'1 ':编程设备... LCK_cycle = NoWait.LCK周期:NoWaitdone.'1':读取状态寄存器内容... CRC错误:写入FDRI时0IDCODE未经过验证 :0DCM锁定:GTS_CFG_B的0状态:GWE的0状态:GHIGH的0状态:VSEL引脚的0值0:VSEL引脚的0值:VSEL引脚的0值:0模式引脚的0值:MODE引脚的0值M0:MODE引脚的0值M1:MODE引脚的0值 M2:CFG_RDY(INIT_B)的0值:来自完成引脚的0DONEIN输入:未找到0SYNC字:0INFO:iMPACT:2219 - 状态寄存器值:INFO:iMPACT - 0000 0000 0000 0000信息:iMPACT:579 - '1':完成下载 bitfile to device.INFO:iMPACT:188 - '1':编程成功完成.LCK_cycle = NoWait.LCK周期:NoWaitINFO:iMPACT - '1':检查完成的引脚.... done.'1':编程终止。 DONE没有变高.PROGRESS_END - 结束操作。经过的时间= 2秒。 以上来自于谷歌翻译 以下为原文 hello : my fpga is xc3s1400a-4fg484 , when i config it , the problem occurs . program fialed with the information of "'1': Programming terminated. DONE did not go high." someone can help me? the impact infromation: GUI --- Auto connect to cable... AutoDetecting cable. Please wait. PROGRESS_START - Starting Operation. Connecting to cable (U*** Port - USB21). Checking cable driver. Driver file xu***_emb.sys found. Driver version: src=1029, dest=1029. Driver windrvr6.sys version = 10.2.1.0. WinDriver v10.21 Jungo (c) 1997 - 2010 Build Date: Aug 31 2010 X86 32bit SYS 14:35:41, version = 1021. Cable PID = 0008. Max current requested during enumeration is 74 mA. Type = 0x0004. Cable Type = 3, Revision = 0. Setting cable speed to 6 MHz. Cable connection established. Firmware version = 1303. File version of C:/Xilinx/13.1/ISE_DS/ISE/data/xu***_xlp.hex = 1303. Firmware hex file version = 1303. PLD file version = 0012h. PLD version = 0012h. PROGRESS_END - End Operation. Elapsed time = 0 sec. Type = 0x0004. ESN device is not available for this cable. Attempting to identify devices in the boundary-scan chain configuration... INFO:iMPACT - Current time: 2015/4/9 8:54:46 PROGRESS_START - Starting Operation. Identifying chain contents...'0': : Manufacturer's ID = Xilinx xc3s1400a, Version : 2 INFO:iMPACT:1777 - Reading C:/Xilinx/13.1/ISE_DS/ISE/spartan3a/data/xc3s1400a.bsd... INFO:iMPACT:501 - '1': Added Device xc3s1400a successfully. ---------------------------------------------------------------------- ---------------------------------------------------------------------- done. PROGRESS_END - End Operation. Elapsed time = 0 sec. '1': Loading file 'E:/phase_array_mux/fpag_cpde/sub_board_zhang_150202_v1/project/sub_board/***oard_top.bit' ... done. INFO:iMPACT:2257 - Startup Clock has been changed to 'JtagClk' in the bitstream stored in memory, but the original bitstream file remains unchanged. UserID read from the bitstream file = 0xFFFFFFFF. INFO:iMPACT:501 - '1': Added Device xc3s1400a successfully. ---------------------------------------------------------------------- ---------------------------------------------------------------------- INFO:iMPACT - Current time: 2015/4/9 8:55:08 PROGRESS_START - Starting Operation. Maximum TCK operating frequency for this device chain: 10000000. Validating chain... Boundary-scan chain validated successfully. '1': Programming device... LCK_cycle = NoWait. LCK cycle: NoWait done. '1': Reading status register contents... CRC error : 0 IDCODE not validated while writing FDRI : 0 DCM Locked : 0 status of GTS_CFG_B : 0 status of GWE : 0 status of GHIGH : 0 value of VSEL pin 0 : 0 value of VSEL pin 1 : 0 value of VSEL pin 2 : 0 value of MODE pin M0 : 0 value of MODE pin M1 : 0 value of MODE pin M2 : 0 value of CFG_RDY (INIT_B) : 0 DONEIN input from Done Pin : 0 SYNC word not found : 0 INFO:iMPACT:2219 - Status register values: INFO:iMPACT - 0000 0000 0000 0000 INFO:iMPACT:579 - '1': Completed downloading bit file to device. INFO:iMPACT:188 - '1': Programming completed successfully. LCK_cycle = NoWait. LCK cycle: NoWait INFO:iMPACT - '1': Checking done pin....done. '1': Programming terminated. DONE did not go high. PROGRESS_END - End Operation. Elapsed time = 2 sec. |
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3个回答
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以下是可能发生这种情况的可能情况:
(1)通常,这表示PROG_B或INIT_B引脚被下拉至GND。 (2)检查电源导轨。 Vccint或Vccaux可能没有达到正确的水平。 根据特定设备的数据表进行验证。 (3)检查Bitgen中设置的安全选项。 某些安全选项禁止回读。 有关更多信息,请参阅(Xilinx答复30883) _______________________________________________如果有助于解决您的查询,请将此帖子标记为“接受为解决方案”。 因此,它将有助于其他论坛用户直接参考答案。如果您认为该信息有用且面向答复,请给予此帖子称赞。 以上来自于谷歌翻译 以下为原文 The following are possible scenarios where this can occur: (1) Usually, this indicates that the PROG_B or INIT_B pins are pulled down to GND. (2) Check your power rails. Vccint or Vccaux might not be at the correct level. Verify this against the data sheet for the specific device. (3) Check the Security Option set in Bitgen. Some security options prohibit readback. For more information, refer to (Xilinx Answer 30883) ________________________________________________ Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer. Give kudos to this post in case if you think the information is useful and reply oriented. |
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我有两个相同的pcb板,一个是好的。
程序失败的板已经配置成功。 当我使用jtag模式时,'1':编程终止。 完成没有高涨。 当我使用主从模式。 计划成功。 但完成的仍然很低。 我使用示波器测量cclk信号。 我发现没有任何信号。 我怀疑程序失败了pcbboard坏了。 以上来自于谷歌翻译 以下为原文 i have two same pcb board, one is OK. THE program failed board had been config successful . when i use the jtag mode, '1': Programming terminated. DONE did not go high. when i use the master slave mode. program success. but the done is still low. i use oscilloscope to measure the cclk signal. i find that there is not any signal. i doubt the program failed pcb board bad . |
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