使用SPI闪存芯片配置我的spartan 6设计时遇到问题

嗨，
我在使用SPI闪存芯片配置我的spartan 6设计时遇到问题。
我看过其他论坛条目（似乎有很多）但仍然没有解决它。
我已经包含了一个原理图（这是一个相当大的工作表，但我把它减少到配置的东西）。
这是IMPACT的输出：
信息：iMPACT  - 当前时间：22.10.2013 15:02:53 // *** BATCH CMD：编程-p 1 -spionly -e -v -loadFPGA PROGRESS_START  - 启动Operation.Maximum TCK工作频率：25000000
.Validating chain ...边界扫描链验证成功。'1'：未检测到SPI访问核心。
SPI访问核心将被下载到设备以启用operations：iMPACT  - 下载核心文件C：/Xilinx/14.6/ISE_DS/ISE/spartan6/data/xc6slx150_spi.cor.'1'：正在下载核心...... LCK_cycle =
NoWait.LCK周期：NoWaitdone.'1'：读取状态寄存器内容... INFO：iMPACT：2219  - 状态寄存器值：INFO：iMPACT  -  0011 1100 1110 1100 INFO：iMPACT：2492  - '1'：已完成下载核心到
device.'1'：IDCODE为'00'（十六进制）。'1'：ID检查failed.INFO：iMPACT：2488  - 操作未成功完成GREEN:iMPACT  -  SPI Device not found.INFO:iMPACT：
2488  - 操作未成功完成FROM:iMPACT  - '1'：Flash未成功编程.PROGRESS_END  - 结束操作。
无论我是在SPIx1还是SPIx4模式下编程，我似乎都得到相同的输出（对于这两种模式，我有两个独立的配置文件）。
JTAG工作正常，我可以使用JTAG配置器件没有问题。
闪存是S25FL129P，扇区为64kb（S25FL129P0XNFI00）
以下是我已经检查过的几件事：
1）ISE版本：SPI配置有时在14.2 / 14.3上有问题。
我尝试过13.3,14.3和14.6，都导致了同样的结果。
2）时钟线：我的原始设计没有时钟终止，因为短截线非常短（11mm）。
我添加了终止并检查但是它没有任何区别。
3）拉起：我的原设计缺少WP / D2和HOLD / D3的上拉。
我添加了一些，没有任何区别。
（这些是必需的，因为我通过将HSWAPEN拉高来禁用引导时的上拉。）
4）检查连接，找不到问题。
我还没试过的一些事情：
1）在UG380的示例中，VFS连接到VFS。
我的设计理由是因为我没有使用eFuse。
这可能是个问题吗？
我没有简单的测试方法，因为焊盘直接连接到接地层。
2）器件启动时只有0和2组供电（它以低功耗模式启动，其中80％的PCB被禁用）。
这不应该干扰配置，因为配置引脚位于bank 2上，但我无法修复它，因为当fpga启动时，设计会自动切换回低功耗模式。
（或者有没有一种方法可以在不重新启动fpga的情况下对闪存进行编程？）
谢谢你的帮助！
马克施奈德。
Spartan6SPI.pdf 117 KB



以下为原文

Hi,
I have a problem configuring my spartan 6 design using an SPI flash chip. I've looked at the other forum entries (there seem to be quite a few) but still haven't solved it.
I have included a schematic (it's quite a big sheet, but I reduced it to the configuration stuff). This is the output of IMPACT:

INFO:iMPACT - Current time: 22.10.2013 15:02:53
// *** BATCH CMD : Program -p 1 -spionly -e -v -loadfpga
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 25000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations.
INFO:iMPACT - Downloading core file C:/Xilinx/14.6/ISE_DS/ISE/spartan6/data/xc6slx150_spi.cor.
'1': Downloading core...
LCK_cycle = NoWait.
LCK cycle: NoWait
done.
'1': Reading status register contents...
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1100 1110 1100
INFO:iMPACT:2492 - '1': Completed downloading core to device.
'1': IDCODE is '00' (in hex).
'1': ID Check failed.
INFO:iMPACT:2488 - The operation did not complete successfully.
INFO:iMPACT - SPI Device not found.
INFO:iMPACT:2488 - The operation did not complete successfully.
INFO:iMPACT - '1': Flash was not programmed successfully.
PROGRESS_END - End Operation.

I seem to get the same output regardless whether I program in SPIx1 or SPIx4 modes (I have two separate configuration files for these two modes).
JTAG works fine, I can configure the device without a problem using JTAG.
The flash is a S25FL129P with 64kb sectors (S25FL129P0XNFI00)

Here are a couple of things I have already checked:
1) ISE Version: SPI config sometimes has problems on 14.2/14.3. I have tried 13.3, 14.3 and 14.6, all lead to the same result.
2) Clock line: My original design didn't have clock termination, as the stub was quite short (11mm). I've added the termination and checked but it made no difference.
3) Pull ups: My original design was lacking pull-ups on WP/D2 and HOLD/D3.  I have added some, made no difference. (these are needed because I disable pull-ups at boot time by pulling HSWAPEN high.)
4) Checked connections, couldn't find a problem.

Some things I have not tried:
1) VFS is connected to VFS in the example in UG380. My design grounds it because I'm not using eFuse. Could this be a problem? I have no easy way of testing this because the pad is directly connected to the ground layer.
2) The device starts with only banks 0 and 2 powered (it starts in a low power mode where 80% of the PCB is disabled). This shouldn't interfere with the configuration, as the configuration pins are on bank 2, but I can't verfy it as the design automatically switches back to low power mode when the fpga is booted. (or is there a way of programming the flash without rebooting the fpga?)

Thank you for you help!

Marc Schneider.

            Spartan6SPI.pdf ‏117 KB