完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
扫一扫,分享给好友
您好,在我们对ISE 13.1的Spartan6-LXT100项目进行功耗分析时,我们收到以下警告:
警告:电源:1583 - 输出IO命名为“MY_SIGNAL_OUT_N”具有无效的银行分配警告:电源:1583 - 输出IO命名为“MY_SIGNAL_OUT_P”具有无效的银行分配警告:电源:1531 - 输入IO命名为“MY_SIGNAL_IN_N”具有无效的银行分配警告: 电源:1531 - 名为“MY_SIGNAL_IN_P”的输入IO具有无效的Bank分配警告:PowerEstimator:270 - 功耗估算被认为是不准确的。 要查看详细信息,请使用“-v”开关生成高级报告。 使用-v标志生成报告显示在XPA期间涉及的银行设置为“空”。但是,在>用户约束文件示例中: NET“MY_SIGNAL_IN_N”IOSTANDARD = LVDS_25; NET“MY_SIGNAL_IN_P”IOSTANDARD = LVDS_25; NET“MY_SIGNAL_OUT_P”IOSTANDARD = LVDS_25; NET“MY_SIGNAL_OUT_N”IOSTANDARD = LVDS_25; NET“MY_SIGNAL_OUT_N”LOC = A6; NET“MY_SIGNAL_OUT_P”LOC = B6; NET“ MY_SIGNAL_IN_N“LOC = C7; NET”MY_SIGNAL_IN_P“LOC = D7; 这些引脚用于SGMII通信。所以我的问题是,为什么IOSTANDARD = LVDS_25的银行设置无效并在XPA期间设置为“空”? 我可以做些什么来解决这个问题吗?谢谢你的回答! 以上来自于谷歌翻译 以下为原文 Hello, during power analysis of our Spartan6-LXT100 project on ISE 13.1, we receive the following warnings: WARNING:Power:1583 - output IO named "MY_SIGNAL_OUT_N" has invalid Bank assignment WARNING:Power:1583 - output IO named "MY_SIGNAL_OUT_P" has invalid Bank assignment WARNING:Power:1531 - Input IO named "MY_SIGNAL_IN_N" has invalid Bank assignment WARNING:Power:1531 - Input IO named "MY_SIGNAL_IN_P" has invalid Bank assignment WARNING:PowerEstimator:270 - Power estimate is considered inaccurate. To see details, generate an advanced report with the "-v" switch. Generating a report using the -v flag shows that the involved banks are set to "empty" during XPA. However, in the >User Constraint File< the banks are defined as IOSTANDARD = LVDS_25. Example: NET "MY_SIGNAL_IN_N" IOSTANDARD = LVDS_25; NET "MY_SIGNAL_IN_P" IOSTANDARD = LVDS_25; NET "MY_SIGNAL_OUT_P" IOSTANDARD = LVDS_25; NET "MY_SIGNAL_OUT_N" IOSTANDARD = LVDS_25; NET "MY_SIGNAL_OUT_N" LOC = A6; NET "MY_SIGNAL_OUT_P" LOC = B6; NET "MY_SIGNAL_IN_N" LOC = C7; NET "MY_SIGNAL_IN_P" LOC = D7; These pins are used for SGMII communication. So my question is, why are the bank settings with IOSTANDARD = LVDS_25 are invalid and set to "empty" during XPA? Can I do something to fix this? Thank you for your answers! |
|
相关推荐
4个回答
|
|
你没有说你正在使用什么包,但我最好的猜测是这是一个6SLX100T-FGG484。
引脚位置A6,B6,C7和D7是专用的MGT引脚,不使用IOSTANDARD属性。 ------您是否尝试在Google中输入问题? 如果没有,你应该在发布之前。太多结果? 尝试添加网站:www.xilinx.com 以上来自于谷歌翻译 以下为原文 You did not say what package you are using, but my best guess is that this is a 6SLX100T-FGG484. The pin locations A6, B6, C7, and D7 are dedicated MGT pins and do not use the IOSTANDARD attribute. ------Have you tried typing your question into Google? If not you should before posting. Too many results? Try adding site:www.xilinx.com |
|
|
|
对于Spartan-6,这些消息来自Xpower并且不正确;
可以安全地忽略它们。没有计划解决这个问题。 以上内容发布在以下AR http://www.xilinx.com/support/answers/38365.htm中 _______________________________________________如果有助于解决您的查询,请将此帖子标记为“接受为解决方案”。 因此,它将有助于其他论坛用户直接参考答案。如果您认为该信息有用且面向答复,请给予此帖子称赞。 以上来自于谷歌翻译 以下为原文 For Spartan-6 these messages come from Xpower and are incorrect; they can be safely ignored.There are no plans to fix this issue. The above was published in the following AR http://www.xilinx.com/support/answers/38365.htm ________________________________________________ Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer. Give kudos to this post in case if you think the information is useful and reply oriented. |
|
|
|
谢谢您的回答!
我们正在使用包fgg676。 这些警告在XPower分析期间出现,而不是在映射期间出现,我们没有使用任何功率降低选项。 但是,我发现我们当前的设计在顶层VHDL上为每个差分信号实例化一个IOBUF,然后在子模块中实例化实际的IOBUFDS。 我认为这是一个非常糟糕的设计实践,删除顶级IOBUF也会删除警告,所以看起来Xpower不同意将IOBUF附加到差分标准。 如果有人能告诉我级联IOBUF和IOBUFDS以及是否(除了XPower警告之外)还有其他风险,我将不胜感激? 以上来自于谷歌翻译 以下为原文 Thank you for your answers! We are using package fgg676. These Warnings appear during XPower analysis and not during Mapping and we are not using any power reduction options. However, I figured out that our current design instantiates an IOBUF on the top-level VHDL for each of both differential signals, and the actual IOBUFDS is then instantiated in a submodule. I assume this is a very bad design practice and removing the top-level IOBUFs also removes the warning, so it seems Xpower does not agree with having an IOBUF attached to a differential standard. I would appreciate if anybody could tell me how bad exactly it is to cascade IOBUF and IOBUFDS and if there are (beside the XPower warning) additional risks? |
|
|
|
>我们正在使用包fgg676。
我检查了6SLX100T-FGG676封装,这个引脚也是专用的MGT引脚。 您无法将SelectIO引脚分配给这些位置。 ------您是否尝试在Google中输入问题? 如果没有,你应该在发布之前。太多结果? 尝试添加网站:www.xilinx.com 以上来自于谷歌翻译 以下为原文 > We are using package fgg676. I checked the 6SLX100T-FGG676 package and this pins are also dedicated MGT pins. You cannot assign SelectIO pins to these locations. ------Have you tried typing your question into Google? If not you should before posting. Too many results? Try adding site:www.xilinx.com |
|
|
|
只有小组成员才能发言,加入小组>>
2427 浏览 7 评论
2828 浏览 4 评论
Spartan 3-AN时钟和VHDL让ISE合成时出现错误该怎么办?
2295 浏览 9 评论
3377 浏览 0 评论
如何在RTL或xilinx spartan fpga的约束文件中插入1.56ns延迟缓冲区?
2467 浏览 15 评论
有输入,但是LVDS_25的FPGA内部接收不到数据,为什么?
1271浏览 1评论
请问vc707的电源线是如何连接的,我这边可能出现了缺失元件的情况导致无法供电
592浏览 1评论
求一块XILINX开发板KC705,VC707,KC105和KCU1500
455浏览 1评论
2010浏览 0评论
736浏览 0评论
小黑屋| 手机版| Archiver| 电子发烧友 ( 湘ICP备2023018690号 )
GMT+8, 2024-12-26 06:59 , Processed in 1.103378 second(s), Total 49, Slave 43 queries .
Powered by 电子发烧友网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
电子发烧友观察
版权所有 © 湖南华秋数字科技有限公司
电子发烧友 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号