怎么在不重新配置FPGA的情况下切换到OSERDES2输出

我有一个Spartan-6设计，它使用ISERDES2和OSERDES2来接收LVDS流，可选地替换数据，然后再将其发送出去。
我现在需要一个透明模式，只是传递未经修改的数据。
如果我只是将ISERDES2的并行输入连接到OSERDES2的并行输出，则会在路径中添加太多延迟。
如果我只使用IBUFDS和OBUFDS并将它们连接在一起，透明模式工作正常（即延迟足够低）。
但是，我需要能够在不重新配置FPGA的情况下切换到OSERDES2输出。
似乎不可能在OSERDES2和OBUFDS之间插入多路复用器（这是有道理的，因为OSERDES2嵌入到IO单元中）。
我可以使用“D Pin级联”来实现这一目标吗？
我正在看ug381中的图3-10。
我不明白的是在最终D FF进入IO缓冲区之前控制多路复用器的原因。
如何选择 - 使用结构逻辑 - 是否选择了序列化结果或SHIFtiN3？
有没有其他解决方案（除了有一个外部LVDS Mux）可以让我实现这个目标？



以下为原文

I'm having a Spartan-6 design that uses an ISERDES2 and OSERDES2 to receive an LVDS stream, optionally replaces the data, and send it out again.

I'm now in the need for a transparent mode that just passes the data unmodified. If I just connect the parallel input of the ISERDES2 to the parallel output of the OSERDES2 there is too much latency added to the path.

If I just use an IBUFDS and OBUFDS and connect them together, the transparent mode works fine (i.e. the latency is low enough). However, I need to be able to switch to the OSERDES2 output without reconfiguring the FPGA.

It seems it's not possible to insert a mux between the OSERDES2 and the OBUFDS (which makes sense, as the OSERDES2 is embedded into the IO cell).

Could I use the "D Pin cascade in" to achieve this? I'm looking at figure 3-10 in ug381. What I don't understand is what controls the mux before the final D FF that goes to the IO buffer. How can I select - using fabric logic - whether the result of the serialization or the SHIFTIN3 is selected?

Are there any other solutions (other than having an external LVDS Mux) that would let me achieve this goal?