哪些FPGA 6 Spartan引脚可以分配数据信号

听起来你还有一些阅读要做。
顾名思义，任何以“IO”开头的引脚都可用于设计的标准输入或输出。
然而，这些引脚中的许多引脚都是多功能的，因此它们是否可用于您的特定设计取决于您是否需要这些引脚用于其备用功能。
Vref就是一例。
这些引脚必须用于在任何存储区中提供参考电压，输入需要像SSTL这样的参考电压。
配置引脚是另一个。
在某些情况下，配置可能需要一些引脚，如SPI串行，或者使用selectMAP的几十个引脚。
对于像您这样的小型设备，使用SPI或可能的4位宽QSPI进行配置通常是有意义的，以限制使用的引脚数量。
配置后，即使这些引脚可以重新利用，但这通常会产生系统级问题。
所以大多数时候你会考虑专用于配置的引脚。
Spartan 6上的模式选择引脚也是如此。通常使用板级电阻上拉或下拉，但配置完成后，它们可用作I / O.
最简单的方法是将它们用作输出，因为FPGA在需要选择配置模式时不会驱动它们。
在严格的设计中，您可以将它们用作输入，但是您需要确保输入源在配置完成之前不驱动它们。
有关Spartan-6 FPGA SelectIO资源用户指南和Spartan-6 FPGA配置用户指南的更多信息。
-  Gabor
在原帖中查看解决方案



以下为原文

It sounds like you still have some reading to do.  As the name implies, any pin starting with "IO" can be used for standard input or output from your design.  However many of these pins are multifunction, so whether they are usable in your particular design depends on whether you need these pins for their alternate function.  Vref is one case.  These pins must be used to supply reference voltage in any bank with inputs requiring a reference like SSTL.  Configuration pins are another.  Configuration can take a handful of pins in some cases like SPI serial, or dozens of pins with selectMAP.  For a small device like yours, it generally makes sense to use SPI or possibly 4-bit-wide QSPI for configuration to limit the number of pins used.  After configuration even these pins can be repurposed, but that often creates system-level issues.  So most of the time you would consider the pins dedicated to configuration.  The same is true of the mode select pins on Spartan 6.  Typically they are pulled up or down with a board level resistor, but after configuration they can be used as I/O.  It's easiest to use them as outputs, since the FPGA won't ever drive them while they're needed to select the configuration mode.  In a tight design, you could use them as inputs, but you'd need to make sure the input source isn't driving them before configuration completes.  More information in Spartan-6 FPGA SelectIO Resources User Guide and Spartan-6 FPGA Configuration User Guide.


-- GaborView solution in original post

以下是包装和引脚分布产品规格的pdf链接
https://www.xilinx.com/support/documentation/user_guides/ug385.pdf



以下为原文

Here is the pdf link for the packaging and pinouts product specification
 
https://www.xilinx.com/support/documentation/user_guides/ug385.pdf

听起来你还有一些阅读要做。
顾名思义，任何以“IO”开头的引脚都可用于设计的标准输入或输出。
然而，这些引脚中的许多引脚都是多功能的，因此它们是否可用于您的特定设计取决于您是否需要这些引脚用于其备用功能。
Vref就是一例。
这些引脚必须用于在任何存储区中提供参考电压，输入需要像SSTL这样的参考电压。
配置引脚是另一个。
在某些情况下，配置可能需要一些引脚，如SPI串行，或者使用selectMAP的几十个引脚。
对于像您这样的小型设备，使用SPI或可能的4位宽QSPI进行配置通常是有意义的，以限制使用的引脚数量。
配置后，即使这些引脚可以重新利用，但这通常会产生系统级问题。
所以大多数时候你会考虑专用于配置的引脚。
Spartan 6上的模式选择引脚也是如此。通常使用板级电阻上拉或下拉，但配置完成后，它们可用作I / O.
最简单的方法是将它们用作输出，因为FPGA在需要选择配置模式时不会驱动它们。
在严格的设计中，您可以将它们用作输入，但是您需要确保输入源在配置完成之前不驱动它们。
有关Spartan-6 FPGA SelectIO资源用户指南和Spartan-6 FPGA配置用户指南的更多信息。
-  Gabor



以下为原文

It sounds like you still have some reading to do.  As the name implies, any pin starting with "IO" can be used for standard input or output from your design.  However many of these pins are multifunction, so whether they are usable in your particular design depends on whether you need these pins for their alternate function.  Vref is one case.  These pins must be used to supply reference voltage in any bank with inputs requiring a reference like SSTL.  Configuration pins are another.  Configuration can take a handful of pins in some cases like SPI serial, or dozens of pins with selectMAP.  For a small device like yours, it generally makes sense to use SPI or possibly 4-bit-wide QSPI for configuration to limit the number of pins used.  After configuration even these pins can be repurposed, but that often creates system-level issues.  So most of the time you would consider the pins dedicated to configuration.  The same is true of the mode select pins on Spartan 6.  Typically they are pulled up or down with a board level resistor, but after configuration they can be used as I/O.  It's easiest to use them as outputs, since the FPGA won't ever drive them while they're needed to select the configuration mode.  In a tight design, you could use them as inputs, but you'd need to make sure the input source isn't driving them before configuration completes.  More information in Spartan-6 FPGA SelectIO Resources User Guide and Spartan-6 FPGA Configuration User Guide.


-- Gabor