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我发现这个论坛不是经常使用的,大多数问题甚至没有评论。不管怎么说,这就是我昨天发现的。我使用GPIF主模式来发送和接收数据,并使用2 ti FIFOS连接到FD引脚。 我一直在阅读通过GPIF。我注意到,接收到的数据与来自周边的数据不符。而且,无论读取多少单词,外部的FIFO都将被清空。 最后,我决定去买一个廉价的逻辑分析仪,看看发生了什么事,因为我不能用我的示波器检查。我拿到了To技工具DV3100。它非常容易配置和使用。所以我把它连接到我的DEV板上并运行了一个测试。我基本上使用GPIF引物设置的单一读取波形。我发现在S0任信号会对很多ifclks保持低位,S1任走高和OE低进行阅读。OE是一钟宽的唯一正确的,但明显的外部数据已经耗尽。我只是不能让GPIF Designer使S0到最后只有1钟所以我无视S0和转移所有的时钟。儿子S0现在是S1 ANS等等。我浪费了一个时钟,但是在S1和S2中,一切都很好。 我检查了S0是一钟长,但是每当我触发波形是停留在这么久。 我也发现,ifclk是不同步的所有的时间,如果你运行它48mhz,我发现在30MHz运行更稳定。我和我的新逻辑分析仪观察到这种行为(500美元)来自Digikey。 请问有人对此发表评论吗? 加布里埃尔·卡米罗 以上来自于百度翻译 以下为原文 Hello, I see that this forum is not used often and most questions are not even commented at all. Anyway this is what I found out yesterday. I'm using GPIF master mode to send and receive data to and from the periferal using 2 TI fifos both connected to the FD pins. I've been working with the reading through gpif. I noted that the data received didn't match the data sent from the periferal. Also that every bulk transaction the external fifo would be emptied no matter how many words were read. Finally I decided to go and buy a cheap logic analyzer to see what was going on since I couldn't check with my oscilloscope. I got the Techtools DV3100. It was very easy to configure and use. So I connected it to my dev board and run a test. I was using basically the single read wave form from the gpif primer setting. I found that in S0 the REN signal would stay low for a LOT of ifclks and in S1 REN goes high and OE low to perform the read. The OE is correct with one clock wide only, but obviously the external data has depleted. I just couldn't make GPIF designer to make S0 to last only 1 clock so I ignored S0 and shifted everything one clock. son S0 now is S1 ans so on. I'm wasting a clock, but in S1 and S2 everything works fine. I checked that S0 was 1 clock long, but somehow whenever I trigger the waveform is stays in S0 for a long time. Also I found that the Ifclk is not in sync all the time if you run it at 48mhz, I found that at 30mhz runs much stable. I observed this behavior with my new logic analyzer ($500) from digikey. Can anyone comment on this, please? Gabriel Camiro |
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哇,这是Stup*D。
今年我参加到同一个问题,我发现我是唯一一个阅读这个论坛。我遇到了同样的问题,现在只有一个FX2LP芯片和单写的而不是读!哈哈哈哈 这很有趣。这就像时间旅行和自言自语。 以上来自于百度翻译 以下为原文 Wow, this is stup*d. I ran into the same problem this year and I find out that I'm the only one reading this forum. I encountered the same problem now only with an FX2LP chip and single write instead of read! hahahaha This is funny. It is like time travel and talking to myself. |
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