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你好,
我正在使用带有gps传感器的zync板,它使用UART协议。 当我在xilinx edk中添加Uartlite ip核心时,我无法打印任何内容。 不知道问题是什么,但我已正确配置核心,只是当我添加它并尝试运行hello world程序时它甚至不打印hello world,但是当我删除核心时它会打印它。 如果您需要更多详细信息,请与我们联系。 谢谢! 以上来自于谷歌翻译 以下为原文 Hello, I am using a zync board with a gps sensor and it uses a UART protocol. When I go to add the Uartlite ip core in the xilinx edk, I am unable to print anything. Not sure what the problem is but I have configured the core correctly its just that when I add it and try to run a hello world program it doesn't even print hello world, but when I remove the core it prints it. Please let me know if you need anymore details. Thanks! |
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R,
如果你试图将uart添加到ARM处理器子系统的AXI总线,你还需要添加AXI总线接口(到uart).... 它并不像你认为的那么容易。 ARM子系统有第二个USB端口,但没有固定到任何有用的东西(例如,与u***到rs232转换器一起使用;或者通过USB连接在PC上用作teraterm的u*** uart) 。 我还有一个GPS规范的温度补偿振荡器,它有一个115,200波特uart接口,我需要带入Zynq芯片。 我曾计划将uart和axi总线的东西放入设备的FPGA端,为它分配一个地址,然后修改linux操作系统以添加IO端口,这样我就可以与我的GPSDO通信了。 我不仅需要完成以上所有操作,而且还必须找到IO引脚,我可以将GPSDO连接到Zynq ZC702 pcb ....(Rx,Tx,接地,3.3v信号) 。 我不想要USB端口,因为GPSDO是rs232(3.3v lvcmos级别)。 Austin Lesea主要工程师Xilinx San Jose 以上来自于谷歌翻译 以下为原文 r, If you are trying to add the uart to the AXI bus of the ARM processor sub-system, you also need to add the AXI bus interface (to the uart).... It it not as easy as you seem to think it is. The ARM sub-system has a second USB port, but it is not pinned out to anything useful (to use with a u*** to rs232 converter, for example; or to use as a u*** uart with teraterm on your PC through a u*** connection). I also have a GPS disciplined temperature compenstated oscillator, which has a 115,200 baud uart interface which I need to bring into the Zynq chip. I had planned to put the uart and the axi bus stuff into the FPGA side of the device, assign it an address, and then modify the linux OS to add the IO port so I can talk to my GPSDO. Not only do I have to do all of the above, but I have to find the IO pins available where I can wire from/to the GPSDO to the Zynq ZC702 pcb....(Rx, Tx, Ground, 3.3v signals). I don't want a u*** port, as the GPSDO is a rs232 (at 3.3v lvcmos levels). Austin Lesea Principal Engineer Xilinx San Jose |
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