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警告:我对PSoC非常陌生。 我一直在试用CY8CKIT-050开发工具包。我很难让DMAS工作…我很确定这是因为我缺乏对DMA的一些理解,无法正确地配置它。我的实验项目是相当直接的:DAC=& gt;ADC=& gt;DMA=& gt;滤波器=& gt;DMA=& gt;RAM。经过大量的努力,我已经能够将ADC的输出传送到滤波器。我使用ADC的12位输出,最初无法获得过滤器来处理数据。看来,由于我使用StaseA作为DMA目的地,所以2字节的传输不是写入StaseAH位置,因此没有触发过滤器来处理数据。从数据表中,我看到我应该适当地设置过滤器DALIGN寄存器,但这似乎没有帮助。所以,我把目的地设置为Stand,2字节的传输写了StaseAH寄存器,都是好的。我在过滤器上使用了一个中断,允许我从过滤器中读取值,并加载一个数组。我使数组1024的大小(我已经缩小到256,便于调试),一旦它是满的,我再次开始在地址0。它工作得很好,我能证实它是按预期工作的。 我的下一步是使用DMA,而不是使用中断和手动读取过滤器和加载数组的数据。我重新配置了过滤器以提供DMA请求。过滤器的数据表规定,对于12位,我应该使用数据对齐和一致性寄存器来适当地设置保持寄存器,所以我这样做。我真正的问题似乎是我无法弄清楚如何进行DMA传输。过滤器数据表有一个“过滤器到RAM”的部分,但是我不能让它工作。我尝试使用DMA向导进行初始创建,然后查看创建的代码。这看起来不错,但我真的不太明白。 我会感激任何人提供的帮助。我已经把这个项目附加到这个消息上。另外,请注意,我已经将P3〔4〕连接到P3〔5〕和P3〔6〕到P3〔7〕,以将DAC路由到ADC。 谢谢, 抢劫 ZIP 4.4兆字节 以上来自于百度翻译 以下为原文 Hi- Warning: I am very new to PSOC. I have been experimenting with the CY8CKIT-050 development kit. I have had a lot of difficulty getting the DMAs to work...I am pretty sure it is because I lack some understanding of the DMA and fail to properly configure it. My experiment project is fairly straight forward: DAC=>ADC=>DMA=>FILTER=>DMA=>RAM. After a great deal of effort, I have been able to transfer the output of the ADC to the filter. I am using 12 bit output from the ADC, and initially could not get the filter to process the data. It seems that since I was using the STAGEA as my DMA destination, the 2 byte transfer was not writing the STAGEAH location, and therefore did not trigger the filter to process the data. From the data sheet, I saw that I should set the Filter DAlign register appropriately, but this did not seem to help. So, I set the destination to STAGEAM, and the 2 byte transfer wrote the STAGEAH register, and all was good. I used an interrupt on the filter to allow me to read the values out of the filter, and load up an array. I made the array 1024 in size(I have since shrunk to 256 for ease of debug), and once it was full, I started again at address 0. It worked just fine, and I was able to verify that it was working as expected. My next step is to use DMA rather than using an interrupt and manually reading the filter and loading the array of data. I reconfigured the filter to provide the DMA request. The datasheet for the filter states that for the 12 bits, I should use the data alignment and also coherency registers to properly setup the HOLD registers, so I am doing that. My real problem seems to be that I cannot figure out how to do the DMA transfer. The filter datasheet has a section for "Filter to RAM", but I am not getting it to work. I tried to use the DMA wizard for initial creation, and then looked at the created code. It looks OK to me, but I really do not understand it all too well. I would appreciate any help that anyone could provide. I have attached the project to this message. Also, please note that I have wired P3[4] to P3[5] and P3[6] to P3[7] to route the DAC to the ADC. Thanks, Rob
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我已经在过滤器数据表中读到,DMA请求输出信号是“粘性的,并且会一直保持高电平直到读取”。我想知道,如果用户必须执行读取,DMA传输从过滤器中得到的好处是什么。为什么不使用ISR功能,当中断指示准备就绪时执行读取?
所以,现在我明白了,我需要执行单个传输,每次执行一个过滤器。但是,由于我仍然试图填充数组并回过头,我正在处理数组地址指针(在255返回到0)。我尝试了下面的DMA配置和中断例程。我使用DMA NRQ中的ISR来增加目标地址,但这不起作用,可能是因为CydMatdStAdvaseScript()只在配置DMA时被称为一次。下面的代码只是继续写入数组中的第一个地址。如何将此设置为使过滤器数据增量写入Filter IA[]数组位置?如果可能的话,我假设在DMA配置中有一个错误。我现在意识到,我不能像我下面所做的那样增加DMA目标地址,我知道DMA有一个自动增加的目标地址,但是我开始相信我现在所做的也许不是真正的正确的方法。也许我应该回去使用过滤器ISR并手动读取数组中的值,就像我以前做过的那样。 定义滤波器Fiffelx大小256 In 16*滤波器位置; ITE16滤光器A [滤光器Buffeli尺寸]; /*FiLTRA中断处理程序(这是由DMA生成的)*/ CythAIS-ISRH-HANDER { 过滤器+ +; AcFiter TrimaMaRead 16(AcFiter Type MahanChnelyA); FielaTaLead=FielaTAL位置+ 1; If(FieldAdA==(FieldBuffrsi-siZe-1)) { 滤纸计数器=0; 过滤器位置; } } 空AcFielaAdMaMax配置() { 定义了AcFieltAdDMAYByTeSyPiulSurb 2 定义了AcFieltAdDMAiRealestyPipe突发1 定义AcFieltAdDMA-SrcBASE(CyDeVelePurrimBaseBasic) 定义AcFieltAdDMAYDDSTBASE(CyDevsRAMiBASE) /*AcFieltAyDMA**的变量声明 *将这些变量声明移到函数的顶部*/ UTI8AcFielaTaDMACHChan. UIT8 8AcFielaTaDMAYTD〔1〕; /*DMA配置用于ACA FielTeaDMA*/ AcFielTaLaDMACHANC= ACHFILTRATA DMAYDMANITIV化(AcFielaAdDMAYBYTESH PARYBY突发,ACAFielaAdDMAI RealestyPipe突发, Hi16(Ac- FielaTaDMA-SRCB基),Hi16(Ac- FielaTa-DMAY-DSTSTBASE); AcFielaTayDMAYTD〔0〕=CydMatalLoad(); CydMatdSt配置(AcFielaTaDMAYTD〔0〕,2,ACA FielTaaY-DMAYTD〔0〕,ACA FieltAydDMAY-TdTyMutOtUnEn; CydMatdStAdvt(AcFielaTaDMAYTD〔0〕,Lo16((UIT32)ACA FielTythMaaHyDaLaTpR),Lo16((UIT32)滤镜位置); CyDmaChSetInitialTd(AcFielaTaDMAChanChana,AcFielaTay-DMAYTD〔0〕; CydMaunTabl(Ac- FielaTaDMAChanChank,1); } 以上来自于百度翻译 以下为原文 I have read in the Filter datasheet that the DMA request output signal is "sticky and will stay high until read". I am wondering what the benefit of DMA transfer from the Filter is if the user must perform a read anyway. Why not just use the ISR functionality and perform the read when the interrupt indicates readiness? So, now I understand that I need to perform single transfers and perform a filter read each time. But, since I am still trying to fill an array and circle back around, I am manipulating the array address pointer (at 255 go back to 0). I tried the following DMA configuration and interrupt routine. I am using the isr from the DMA nrq to increment the destination address, but this doesn't work, probably because the CyDmaTdSetAddress() is only called the one time when configuring the DMA. The code below just continues to write the first address in the array. How can I set this up such that the filter data is incrementally written to the Filter_A[ ] array locations? If it is possible, I assume that I have an error in the DMA configuration. I recognize now that I cannot increment the DMA destination address on my own as I am trying to do below, and I know that there is an auto-increment destination address for the DMA, but I am beginning to believe that what I am trying to do now is perhaps not really the right way to do it. Perhaps I should go back to using the filter ISR and manually read the values into the array as I have done before, etc. Am I missing the mark here? #define FILTER_BUFFER_SIZE 256 int16 * FilterA_location; int16 Filter_A[FILTER_BUFFER_SIZE]; /* FilterA interrupt handler routine (this is generated by the DMA) */ CY_ISR( FILTERA_isr_handler ) { FILTERcounterA ++; AC_Filter_MA_Read16(AC_Filter_MA_CHANNEL_A); FilterA_location = FilterA_location + 1; if (FILTERcounterA == (FILTER_BUFFER_SIZE-1)) { FILTERcounterA=0; FilterA_location = Filter_A; } } void AC_FILTERA_DMA_Config() { #define AC_FILTERA_DMA_BYTES_PER_BURST 2 #define AC_FILTERA_DMA_REQUEST_PER_BURST 1 #define AC_FILTERA_DMA_SRC_BASE (CYDEV_PERIPH_BASE) #define AC_FILTERA_DMA_DST_BASE (CYDEV_SRAM_BASE) /* Variable declarations for AC_FILTERA_DMA */ /* Move these variable declarations to the top of the function */ uint8 AC_FILTERA_DMA_Chan; uint8 AC_FILTERA_DMA_TD[1]; /* DMA Configuration for AC_FILTERA_DMA */ AC_FILTERA_DMA_Chan = AC_FILTERA_DMA_DmaInitialize(AC_FILTERA_DMA_BYTES_PER_BURST, AC_FILTERA_DMA_REQUEST_PER_BURST, HI16(AC_FILTERA_DMA_SRC_BASE), HI16(AC_FILTERA_DMA_DST_BASE)); AC_FILTERA_DMA_TD[0] = CyDmaTdAllocate(); CyDmaTdSetConfiguration(AC_FILTERA_DMA_TD[0], 2, AC_FILTERA_DMA_TD[0], AC_FILTERA_DMA__TD_TERMOUT_EN); CyDmaTdSetAddress(AC_FILTERA_DMA_TD[0], LO16((uint32)AC_Filter_MA_HOLDA_PTR), LO16((uint32)FilterA_location)); CyDmaChSetInitialTd(AC_FILTERA_DMA_Chan, AC_FILTERA_DMA_TD[0]); CyDmaChEnable(AC_FILTERA_DMA_Chan, 1); } |
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