可以在Vivado时序分析器工具中指定温度和电压值来估算设计时序吗？

嗨桑卡，
查看本教程的第三个实验。
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_2/ug986-vivado-tutorial-implementation.pdf
A）Vivado DesignSuitedoes没有等效的TEMPERATURE约束命令，因为从6系列设备开始，TEMPERATURE约束不会影响设计。
由于Vivado工具仅支持7系列器件，因此不需要等效的TEMPERATURE约束。实现工具在时序驱动算法中不使用'set_operating_conditions'。
在功率分析期间使用此命令。
问候
Sikta



以下为原文

Hi Sanka,
Check the third lab of the tutorial.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_2/ug986-vivado-tutorial-implementation.pdf
 
A) Vivado Design Suite does not have an equivalent command for TEMPERATURE constraint, because, starting from 6 series devices, the TEMPERATURE constraint does not affect the design. Since Vivado tools only support 7 series devices, there is no need of an equivalent TEMPERATURE constraint.the implementation tools do not use the ‘set_operating_conditions’ during the timing-driven algorithms.  This command is used during the power analysis.
 
Regards
Sikta

As Sikta，As Sanka提到，是否有可能放宽Virtex-7 FPGA的电压限制以改善时序.Regards，Benny



以下为原文

Hi Sikta,

As Sanka mentioned, is it possible to relax voltage constraints fot Virtex-7 FPGA to improve timing.


Regards,
Benny

嗨本尼，
改变7系列器件的温度/电压范围没有限制。
如果您遇到任何时间问题，请在Timing论坛发布，我会尽力帮助。
:)
谢谢，
佳日



以下为原文

Hi Benny,
 
There is no constraint to change the temperature/voltage ranges for 7-series devices.
If you are facing any timing issue please post that in Timing forum, I will try to help on that. :)
 
Thanks,
Yash