如何管理200MHz的外部信号

你好，
我正在使用FPGA xc3s1400a-4ft256（Spartan 3A）来控制外部设备（FTDI USB外部控制器），如附图所示。
状态机被设计为在FTDI上生成WRITE信号并检查其他信号以验证传输是否完成。
该状态机运行在200MHz。
我不确定外部信号（状态机逻辑的输入）在使用前是否需要一些过程。
范围显示意外结果或解释问题？
这似乎是状态机没有理由改变状态。
随附的是带有望远镜信号的图像：
按预期结果停止
意外结果停止了
由于输入信号，运行过多的“抖动”？
在获取状态机逻辑之前，我可以定义任何约束来管理这些信号吗？
有什么想法或建议吗？ThanksJulio



以下为原文

Hello,

I'm using a FPGA xc3s1400a-4ft256 (Spartan 3A) to control an external device (FTDI USB external controller) as show the attached picture.

A state machine is designed to generate the signals to WRITE on the FTDI and check others signals to verify if the transmission is completed. This state machine is running at 200MHz.


I'm not sure if the external signals (inputs to the state machine logic) need some process before use. The scope shows unexpected results or is a interpretation issue? That seems the state machine change state without reason.

Attached is a image with the scope signals:

• Stopped with results as expected
• Stopped with unexpected results
• Running with too much "jitter" because the input signals?
  

Can I define any constraint to manage these signals before source the state machine logic?

Any idea or suggestions?
Thanks
Julio