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您好专家,大师和社区成员,
显然正在通过这个论坛显示到目前为止还没有人将Atlys VMODCam参考设计移植到Nexys 3,所以我想要求提供一个通用指南,让新手和中级用户不那么痛苦。 在我的建议中,例如: 1. Atlys参考设计使用某种类型的DDR2 RAM(由MIG生成的接口)来缓冲来自VMODCam的视频数据,是否可以按原样使用,但当然分别改变UCF文件中的引脚分配? 或者Nexys 3的CellRAM / PCM / SPI RAM可以直接访问和连接? 2. Atlys参考设计使用中央模块进行总时钟管理。 它是如何工作和与单个模块交互的? 它可以直接移植还是需要通过Clocking向导重新创建? 在为Nexys3执行此步骤时要记住的任何约束或建议? 3. Atlys参考设计使用DVI视频输出格式。 并且由于Nexys 3不支持它,但是VGA然后在从内存帧缓冲区获取VGA输出时要考虑什么(如第1点所述)? 4.还有其他建议和指导吗? 祝大家早上好。 - 来自DE的问候 以上来自于谷歌翻译 以下为原文 Hello Experts, Gurus and Community Members, As apparently going through this forum shows that nobody so far has succedded in porting the Atlys VMODCam reference design to Nexys 3, so I would like to request that a general guideline be provided for making such thing less painful for newbies and intermediate users. In my suggestion, for example: 1. Atlys reference design uses a certain type of DDR2 RAM (it's interface generated by MIG) for buffering the video data from VMODCam, can it be used as it is, but of course changing the pin assignments in UCF file respectively? Or CellRAM/PCM/SPI RAM of Nexys 3 be accessed and interfaced with directly? 2. Atlys reference design uses a central module for total clock managment. How is it working and interacting with individual modules? Can it be ported directly or it also needs to be re-created via Clocking wizard? Any constraints or suggestions to keep in mind while doing this step for Nexys3? 3. Atlys reference design uses a DVI video output format. And since Nexys 3 has no support for it but VGA then what to consider while making the VGA output to be taken from the memory frame buffer (as mentioned in point 1.)? 4. Any other suggestions and guidlines? Have a great morning. --greetings from DE |
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一个,
Spartan 3系列现在已经很老了,所以当发生这种情况时,我们看不到有人用它开始新的电路板设计,所以兴趣就会下降。 由于这是Digilent支持的产品,因此他们也可以决定他们的意愿,并且不会支持(做)。 对不起,如果这是一个失望。 Austin Lesea主要工程师Xilinx San Jose 以上来自于谷歌翻译 以下为原文 a, The Spartan 3 line is quite old now, so when that happens, we do not see anyone starting new board designs with it, so interest drops off. As this is a Digilent supported product, it is also up to them to decide what they will, and will not support (do). Sorry if that is a dissapointment. Austin Lesea Principal Engineer Xilinx San Jose |
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奥斯汀,
感谢更新,但据我所知,Nexys 3主板有一个Spartan 6 LX16而不是3,显然它也不是那么老了。 我担心的是这是一个真正的问题,很多人在设计导入方面遇到了麻烦。 祝你有美好的一天。 - 来自DE的报告 以上来自于谷歌翻译 以下为原文 Austin, thanks for updating but as far as I know Nexys 3 board has a Spartan 6 LX16 and not 3 as apparently it's not that old too. My concern was that it's a genuine problem and a lot of people are having trouble in design import. Have a good day. --Greetings from DE |
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一个,
好。 让我们看看有多少人回复此事。 这是一个问题吗? 有很多人有问题吗? 如果你不说话,我们不知道。 这需要修复吗? Austin Lesea主要工程师Xilinx San Jose 以上来自于谷歌翻译 以下为原文 a, OK. Let us see how many people reply tio this. Is this a problem? Are lots of people having issues? If you don't speak up, we don't know. Does this need to be fixed? Austin Lesea Principal Engineer Xilinx San Jose |
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Austin--
几个月前我从digilent购买的nexys3板连接到vmodcam也很困难。 从那时起,我一直在尝试编写自己的I2C控制接口,以便在相机上读取R [0x3000]以确认它是否正常工作。 我似乎无法在任何地方为nexys3找到合适的vhdl代码。使用chipcope analyze和我自己的控制界面,我可以看到相机没有确认我的第一个控制位(mt9d112设备地址0x78)并且正在驱动确认高。 我想知道我的代码是否错误或者它可能是别的东西。 我今晚将审查我的通电和硬复位序列。 有没有其他方法来测试vmodcam板? 我感谢xilinxcommunity的支持。 阿德里安 以上来自于谷歌翻译 以下为原文 Austin-- I am also having a lot of difficulty connecting to the vmodcam from the nexys3 board I purchased from digilent a few months ago. Since then I've been trying to write my own I2C control interface to read R[0x3000] on the camera to confirm it is working. I cannot seem to find suitable vhdl code for the nexys3 anywhere. Using chipscope analyzer and my own control interface, I can see that the camera is not acknowledging my first control bit (the mt9d112 device address 0x78) and is driving acknowledge high. I am wondering if my code is wrong or maybe it's something else. I'll be reviewing my powerup and hard reset sequence tonight. Is there another way to test the vmodcam board? I appreciate the support from the xilinx community. Adrian |
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阿德里安,
我想,这没什么用,但这里有Digilent公司关于Nexys 3和VMODCam参考设计导入的两个官方回复: 1.“ - 我们认为VmodCam无法与Nexys3一起使用 - 我们建议将VmodCam与Nexys3一起用于图像应用程序,而不是视频应用程序。 Nexys3缺乏DDR使视频应用难以置信。 甚至图像处理也需要复杂的仲裁/缓冲方案来访问CellRAM。 - 我们没有使用Nexys3的VmodCam演示,但我们指出需要这样的演示。 当这样的演示存在时,我们会通知您。 “ 2.“由于Nexys3没有DDR2,你需要重新设计整个内存控制器电路,包括时钟方案。不幸的是,MIG不支持Nexys3上的CellRam,所以你必须建立自己的控制器 更好的说,CellRAM比DDR2更容易接口,你的控制器可能只需要一个时钟信号(这意味着你可以删除Syscon块为MIG DDR2生成的所有复杂信号/时钟) 为了设计一个CellRAM控制器,你需要参考CellRAM数据表,这里有微米级数据表:http://download.micron.com/pdf/datasheets/psram/128mb_burst_cr1_5_p26z.pdf。“ 我也在朝着同一个方向工作,但我直接使用相机模块和TWI(I2C)模块来自digilent参考设计。 您可以查看并解决您的问题,因为您提供的描述没有多大帮助。 以下是Atlys相机控制参考设计的代码片段,供快速参考: 信号CamInitRAM:CamInitRAM_type:=(IRD& x“30000000”, - 芯片版本。默认值0x1580 IWR& x“32140D85”, - 转换速率控制,PCLK 5,D 5 IWR& x“341E8F0B”, - PLL控制; 默认值0x8F0B IWR& x“341C0250”, - PLL分频器; M = 80,N = 2,fMCLK = fCLKIN * M /(N + 1)/ 8 = 80MHz IWR& x“341E8F09”, - PLL控制; 上电PLL; 等了1ms之后! IWR& x“341E8F08”, - PLL控制; 关闭旁路 IWR& x“3202000C”, - 使相机退出待机状态,但停止MCU以允许配置IRD& x“32040000”, - 应检查位[1]的初始状态IWR& x“338C2795”, - 输出格式; 上下文阴影IWR& x“33900030”,IWR& x“338C2719”, - 读取模式; 背景资料IWR& x“3390046C”,IWR& x“338C2703”, - 输出宽度; 背景资料IWR& x“33900280”, - 640 IWR& x“338C2705”, - 输出高度; 背景资料IWR& x“339001E0”, - 480 IWR& x“338C2751”, - 裁剪X0; 背景资料IWR& x“33900000”, - 0 IWR& x“338C2755”, - 裁剪Y0; 背景资料IWR& x“33900000”, - 0 IWR& x“338C2753”, - 裁剪X1; 背景资料IWR& x“33900320”, - 800 IWR& x“338C2757”, - 裁剪Y1; 背景资料IWR& x“33900258”, - 600 - IWR& x“338CA103”, - 刷新音序器 - IWR& x“33900005”, - = 5-- IWR& x“338CA103”, - 刷新音序器模式 - IWR& x“33900006”, - = 6 IWR& x“32020008”, - Kick-start MCU IWR& x“301A02CC” - 复位/输出控制; 并行使能,驱动引脚,开始流式传输); 你使用什么内存和/或缓冲区? CellRAM / PCM? 祝你今天愉快 - 来自DE的报告 P.S:希望到目前为止,Austin会在这个论坛中搜索有关Nexys 3和VMODCam的类似问题! ;-) 以上来自于谷歌翻译 以下为原文 Adrian, I guess, it's not much helpful but here are two official responses from Digilent Inc regarding Nexys 3 and VMODCam reference design import: 1. " - We see no reason that the VmodCam cannot be used with the Nexys3 - We recommend the VmodCam be used with the Nexys3 for image applications, not video applications. The lack of DDR on the Nexys3 makes video applications implausible. Even image processing will require a complex arbitration/buffering scheme for accessing the CellRAM. - We don’t have a demo for VmodCam working with the Nexys3, but we pointed the need for such a demo. When such a demo will exist, we will let you know. " 2. " Since the Nexys3 does not have DDR2, You will need to redesign the entire memory controller circuit, including the clocking scheme. Unfortunately, the CellRam on the Nexys3 is not supported by the MIG, so you will have to build your own controller. On a better note, the CellRAM is much simpler to interface with than DDR2, and your controller will likely only need a single clock signal (this means you can remove all of the complicated signals/clocks generated by the Syscon block for the MIG DDR2 controller). In order to design a CellRAM controller, you will need to refer to the CellRAM data sheet, available from micron here: http://download.micron.com/pdf/datasheets/psram/128mb_burst_cr1_5_p26z.pdf." I'm also working in the same direction but I am using the camera module along with the TWI (I2C) module directly from digilent reference design. May be you can look into that and resolve your issue as the description you provided is not much helpful. Here is a code snippet from Atlys reference design for camera control, for a quick reference: signal CamInitRAM: CamInitRAM_type := ( IRD & x"30000000", -- Chip version. Default 0x1580 IWR & x"32140D85", -- Slew rate control, PCLK 5, D 5 IWR & x"341E8F0B", -- PLL control; Default 0x8F0B IWR & x"341C0250", -- PLL dividers; M=80,N=2,fMCLK=fCLKIN*M/(N+1)/8=80MHz IWR & x"341E8F09", -- PLL control; Power-up PLL; wait 1ms after this! IWR & x"341E8F08", -- PLL control; Turn off bypass IWR & x"3202000C", -- Take camera out of standby, but Stop MCU to allow configuration IRD & x"32040000", -- Bit [1] should be checked for init status IWR & x"338C2795", -- Output format; Context A shadow IWR & x"33900030", IWR & x"338C2719", -- Read mode; Context A IWR & x"3390046C", IWR & x"338C2703", -- Output width; Context A IWR & x"33900280", -- 640 IWR & x"338C2705", -- Output height; Context A IWR & x"339001E0", -- 480 IWR & x"338C2751", -- Crop X0; Context A IWR & x"33900000", -- 0 IWR & x"338C2755", -- Crop Y0; Context A IWR & x"33900000", -- 0 IWR & x"338C2753", -- Crop X1; Context A IWR & x"33900320", -- 800 IWR & x"338C2757", -- Crop Y1; Context A IWR & x"33900258", -- 600 -- IWR & x"338CA103", -- Refresh Sequencer -- IWR & x"33900005", -- = 5 -- IWR & x"338CA103", -- Refresh Sequencer Mode -- IWR & x"33900006", -- = 6 IWR & x"32020008", -- Kick-start MCU IWR & x"301A02CC" -- reset/output control; parallel enable, drive pins, start streaming ); What memory and/or buffer are you using? CellRAM/PCM? Have a nice day --Greetings from DE P.S: Hopefully, by now, Austin would have searched through this forum for similar issues regarding Nexys 3 and VMODCam! ;-) |
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虽然没有太大的成功,但这里是一个示例项目,它从VMODCam模块读取并写入VGA。
它使用带有单个端口的CellRAM来读取和写入来自摄像机的数据。 它没有正确显示数据,但我仍在努力。 任何帮助表示赞赏。 我们非常欢迎评论,改进,建议和自然修复。 - 来自DE的问候 P.S:Dev enironment是ISE 14.2。 CellRAM_VMODCam_VGA_V4_RunningGarbageDisplayFromCamera.zip 1838 KB 以上来自于谷歌翻译 以下为原文 Though not much successful but here is a sample project which reads from VMODCam module and writes to VGA. It uses the CellRAM with a single port to read and write data from camera. It does not display the data correctly but I'm still working on it. Any help is appreciated. Reviews, improvements, suggestions and naturally fixes are more than welcome. --greetings from DE P.S: Dev enironment is ISE 14.2. CellRAM_VMODCam_VGA_V4_RunningGarbageDisplayFromCamera.zip 1838 KB |
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你好!
ada_spark,你真的设法连接nexys 3和VmodCAM,或者你只是假设设计有点工作(尽管不正确)。 我尝试了你附带的设计,但我无法确定相机是否正常工作。 我的问题是VmodCAM没有响应,或者更确切地说,它确认了它的地址(x78)然后停止响应(只有不确认)。 上电和复位序列是正确的,I2C模块正在工作,我检查并重新检查所有内容(网表,频率,所有模拟都可以......),但它仍然无法正常工作。 显然我不是一个孤立的案例: http://people.bu.edu/hupv/projects/2012/12/22/simple-motion-detection-by-background-subtraction.html 有没有人设法连接这两个板,实际上收到了来自VmodCAM的多个响应? 祝你今天愉快! 德拉甘 以上来自于谷歌翻译 以下为原文 Hello! ada_spark, have you actually managed to connect nexys 3 and VmodCAM or you just assume that the design is somewhat working (although not correctly). I tryed the design you attached, but I can not determine that the camera is working. My problem is that VmodCAM does not respond or, to be more precise, it acknowledges its address (x78) and then stops responding (only no-acknowledge). The power-up and reset sequence are correct, the I2C modul is working, I checked and re-checked everything (net list, frequences, all simulations are OK ...), but it still does not work. Apparently I am not an isolated case: http://people.bu.edu/hupv/projects/2012/12/22/simple-motion-detection-by-background-subtraction.html Have anyone managed to connect this two boards and actually received more than one response from VmodCAM? Have a nice day! Dragan |
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ada_spark ..........我尝试将代码直接运行到nexys 3板上,并将vga端口与显示器连接。
不幸的是,它不适用于我的情况。 问题是,即使我分离vmodcam,我仍然在显示器上有相同的输出。 如果您找到了有关代码的解决方案,请将其附在此处,以便它可以帮助很多人。 以上来自于谷歌翻译 以下为原文 ada_spark ..........I tried to run your code directly onto the nexys 3 board and connected the vga port with the monitor. Unfortunatly it is not working in my case. The problem is that even if i detach the vmodcam , I am still having a same output on the monitor . If you have found a solution regarding your code please attach it here so that it can help a lot of people . |
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这正是我所尝试的,结果与您描述的相同,意味着使用或不使用VmodCAM的相同输出。
以上来自于谷歌翻译 以下为原文 That is exactly what I tryed, the resul is the same as you described, meaning the same output with or without VmodCAM. |
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据我所知...........问题可以在两个主要代码....................它是在vga中
发送器或如何在代码中将数据保存在Cellular ram中....................如果有人在解决问题方面取得了进展并且有一个工作代码,请帮助 我 ...................... 以上来自于谷歌翻译 以下为原文 As far as I can understand ...........The problem can be in two major codes.................... either it is in vga transmitter or How the data is saved in Cellular ram in the code.................... If anyone has made a progress in solving the issue and has a working code kindly help me ...................... |
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跳线也有任何变化...........因为这也可能导致问题
以上来自于谷歌翻译 以下为原文 Is there any changes in the jumpers also ...........because that may also cause the problem |
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对我来说,加载跳线P4就可以了。
没有它,VHDC端口没有足够的电力来为VmodCam供电,这意味着Aptina MCU没有接收到任何指令。 现在,我可以看到从相机到达的像素时钟。 最好的祝福, 丹尼尔 以上来自于谷歌翻译 以下为原文 For me, loading the jumper P4 did the trick. Without it, the VHDC port hasn't enough power to feed the VmodCam, what obiously means that the Aptina MCU isn't receiving any instruccion. Now, I can see the Pixel Clock arriving from the camera. Best Regards, Daniel |
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acosti写道:
对我来说,加载跳线P4就可以了。 没有它,VHDC端口没有足够的电力来为VmodCam供电,这意味着Aptina MCU没有接收到任何指令。 现在,我可以看到从相机到达的像素时钟。 最好的祝福, 丹尼尔 这是你在谈论的跳投吗? (在VHDCI连接器正上方,它与JTAG连接器之间) 在我的电路板上,那个位置没有安装跳线(你的电路板也是如此吗?)所以我不得不使用我的,呃,有问题的焊接技术并在那里安装一个。 不知道我是否做得不错,因为我仍然无法使用ada_spark的代码获得可用的图像。 所以我不确定我的可疑焊接技术或ada_spark的代码是否有问题,尽管迹象似乎指向后者; 加上跳线后,我看到的颜色静电图形与我在安装跳线之前看到的不同。 而且,更有说服力的是,当我拔下相机时,图案会发生变化,这似乎表明正在从相机接收到某些东西。 如果我在摄像机前挥动物体和/或使灯光更亮/更暗/完全关闭它,我可以得到垃圾的模式从根本上改变。 (稍微偏离主题:我注意到我的主板上有另一个跳线位置没有安装跳线针脚,标记为JP7(HSWAP)。任何人都知道它的作用/用途是什么?我没有看到任何文件,虽然我确实看到了 列在原理图上。) 以上来自于谷歌翻译 以下为原文 acosti wrote:Is this the jumper you are talking about? (directly above the VHDCI connector, between it and the JTAG connector) On my board, there was no jumper installed at that position (was that the case with your board as well?) So I had to employ my, er, questionable soldering skills and attach one there. Not sure if I did it properly though, as I am still not able to get a usable image with ada_spark's code. So I am not sure if my dubious soldering skills or ada_spark's code is at fault, although signs seem to point to the latter; with the jumper loaded, I am seeing a different pattern of colored static than what I saw before installing the jumper. And, even more telling, when I unplug the camera, the pattern changes, which seems to indicate that something is being received from the camera. And I can get the pattern of garbage to change radically if I wave objects in front of the cameras and/or make the lights brighter/dimmer/turn them off entirely. (slightly off topic: I notice there's another jumper position sans installed jumper pins on my board, labeled JP7 (HSWAP). Anyone know what this does/what it's for? I don't see any documentation on it, although I do see it listed on the schematics.) |
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是的,这是跳投。
我也焊接了它,因为我也有一块板子没有完成焊接。 我一直在研究,现在很明显你需要有VU端口供电以使VmodCAM正常工作,因为除了一些VCC引脚外,这是主要的电源。 关于ada_spark代码,我没有使用它。 我拿了digilent的参考代码并且为Nexys3摆脱了无用的东西,之后: 1-确保从相机传来的像素时钟正常工作。 我是用闪烁的LED做的。 2-我的最终目的不是nexys3板,所以我使用RAM块来避免使用Microcon存储芯片。 有了这么少的内存你就不会看到整个画面,但你可以测试VmodCAM是否正常工作。 问候, 丹尼尔 以上来自于谷歌翻译 以下为原文 Yes, that's the jumper. I welded it too, cause I also have a board withot that weld done. I've been researching and now it's pretty obvious you need to have that VU port fed in order to have the VmodCAM working, since that is the main power source, besides some VCC pins. Regarding the ada_spark code, I didn't use it. I took the digilent's reference code and got rid of anithing useless for the Nexys3, and after that: 1- Make sure that the pixel clock comming from the camera was working. I did it using blinking leds. 2- My final purpose is not the nexys3 board, so I use the RAM blocks to avoid using the Microcon memory chips. With that little amount of memory you won't see the whole picture, but you can test the VmodCAM is working. regards, Daniel |
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你好
这可能是显而易见的,但我发现很难解决。 相机的数据是16位。 但是Nexys 3主板上的vga端口只有8位。 这意味着我们必须妥协一半的图像质量分辨率, 有没有更好的方法来使用vga而不影响图像质量。 以上来自于谷歌翻译 以下为原文 Hi This may be obvious but I am finding it difficult to solve. The data from the camera is 16 bit . But the vga port on the Nexys 3 board is only 8 bit. This means that we have to compromise half of the resolution of picture quality , Is there any better way of using vga without compromising the quality of image . |
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相机的数据是16位。
但是Nexys 3主板上的vga端口只有8位。 这意味着我们必须妥协一半的图像质量分辨率, 有没有更好的方法来使用vga而不影响图像质量。 在Nexys3原理图的第2页上,有一个由电阻求和构成的原始3通道DAC。 如果您真的对为VGA输出添加音调分辨率感兴趣,可以通过适当大小的电阻将额外的FPGA输出连接到R | G | 连接器J2上的B视频节点。 您可能会对使用不同的视频处理板感到满意。 我怀疑优秀的输出视频是Nexys3设计的产品要求。 - 鲍勃埃尔金德 签名:新手的自述文件在这里:http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结:1。 阅读手册或用户指南。 你读过手册了吗? 你能找到手册吗?2。 搜索论坛(并搜索网页)以寻找类似的主题。 不要在多个论坛上发布相同的问题。 不要在别人的主题上发布新主题或问题,开始新的主题!5。 学生:复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。 提供有用的详细信息(请与网页,数据表链接).7。 您的代码中的评论不需要支付额外费用。 我没有支付论坛帖子的费用。 如果我写一篇好文章,那么我一无所获。 以上来自于谷歌翻译 以下为原文 The data from the camera is 16 bit . But the vga port on the Nexys 3 board is only 8 bit. This means that we have to compromise half of the resolution of picture quality , Is there any better way of using vga without compromising the quality of image . There is a crude 3-channel DAC of sorts built from resistor-summing, on page 2 of the Nexys3 schematics. If you are truly interested in adding tonal resolution to the VGA output, you can wire up additional FPGA outputs, through appropriately sized resistors, to the R | G | B video nodes at connector J2. You may be happier with a different board for video processing. I doubt that excellent output video was a product requirement for the Nexys3 design. -- Bob Elkind SIGNATURE: README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369 Summary: 1. Read the manual or user guide. Have you read the manual? Can you find the manual? 2. Search the forums (and search the web) for similar topics. 3. Do not post the same question on multiple forums. 4. Do not post a new topic or question on someone else's thread, start a new thread! 5. Students: Copying code is not the same as learning to design. 6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please). 7. You are not charged extra fees for comments in your code. 8. I am not paid for forum posts. If I write a good post, then I have been good for nothing. |
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感谢Bob的快速回复..
问题是,即使我将J2跳线上的电阻连接到最多5个,但我仍然不会使用完整的16个像素。 您提供的解决方案可能会将分辨率提高到某个级别,但它不是最佳分辨率。 不幸的是,我没有自由改变董事会,这是解决这个问题最简单的方法。 阿德南 以上来自于谷歌翻译 以下为原文 Thanks Bob for your quick response.. The problem is that even if I connect the resistors on the J2 jumper upto max 5 more but still I wont be using the complete 16 pixels. The solution you have provided may increase the resolution upto some level but it wont be optimum resolution. Unfortunatly I dont have the freedom to change the board which is the most easiest way to solve this problem . Adnan |
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您提供的解决方案可能会将分辨率提高到某个级别,但它不是最佳分辨率。
更糟糕的是,信号质量远非最佳。 合适的模拟VGA源应具有75欧姆的源阻抗,并驱动至75欧姆的负载阻抗。 这需要比Nexys3板上更多的电路和保养。 如果您对高质量输出视频非常感兴趣(我建议使用数字视频,而不是模拟视频),则需要重新使用不同的电路板。 例如,Atlys董事会可能更适合您的需求。 - 鲍勃埃尔金德 签名:新手的自述文件在这里:http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结:1。 阅读手册或用户指南。 你读过手册了吗? 你能找到手册吗?2。 搜索论坛(并搜索网页)以寻找类似的主题。 不要在多个论坛上发布相同的问题。 不要在别人的主题上发布新主题或问题,开始新的主题!5。 学生:复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。 提供有用的详细信息(请与网页,数据表链接).7。 您的代码中的评论不需要支付额外费用。 我没有支付论坛帖子的费用。 如果我写一篇好文章,那么我一无所获。 以上来自于谷歌翻译 以下为原文 The solution you have provided may increase the resolution upto some level but it wont be optimum resolution. Even worse, the signal quality will be far from optimum. A proper analogue VGA source should have 75-ohm source impedance, and drive into 75-ohm load impedance. This requires considerably more circuitry and care than is found on the Nexys3 board. If you are strongly interested in high-quality output video (and I would recommend digital video, not analogue video, for such purposes), you will need to start over with a different board. The Atlys board, for example, might be more appropriate for your needs. -- Bob Elkind SIGNATURE: README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369 Summary: 1. Read the manual or user guide. Have you read the manual? Can you find the manual? 2. Search the forums (and search the web) for similar topics. 3. Do not post the same question on multiple forums. 4. Do not post a new topic or question on someone else's thread, start a new thread! 5. Students: Copying code is not the same as learning to design. 6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please). 7. You are not charged extra fees for comments in your code. 8. I am not paid for forum posts. If I write a good post, then I have been good for nothing. |
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