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我无法找到IODRP2_MCB原语的任何文档。 Xilinx文档中唯一提到它的地方是用于HDL设计的Spartan-6库指南(UG615 - v12.1,第138页),其中包含指向其他文档的链接,其中没有可用的信息。 最好的祝福 以上来自于谷歌翻译 以下为原文 Hi everybody, I was unable to find any documentation for the IODRP2_MCB primitive. The only place where it is mentionned in Xilinx's docs is the Spartan-6 Libraries Guide for HDL Designs (UG615 - v12.1, page 138) with a link to other docs where no information is available. Best Regards |
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5个回答
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关于这个原语没有额外的公开文档。
它不包括在12.2 S6 Libraries Guide中。 在11.5 - 它有评论。 / * IODRP2_MCB是存储器接口生成器(MIG)内核与之结合使用的组件 MCB块实现外部存储器接口。 不支持在MIG之外使用此块。 * / 我不是这个决定的一部分,但是你所看到的(或者在这种情况下不是这样)是有意的。 BT 以上来自于谷歌翻译 以下为原文 There is no additional public documentation on this primitive. It is not included 12.2 S6 Libraries Guide. In 11.5 - it has the comment. /* The IODRP2_MCB is a component used by the Memory Interface Generator (MIG) core in conjunction with the MCB block to implement external memory interfaces. The use of this block outside of MIG is not supported. */ I wasn't part of this decision but what you see (or don't in this case) was intended. bt
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嗨,
谢谢你的快速回答。 据我所知,使用MCB的唯一方法是使用MIG。 直接在设计中进行设置是不可能的,因为必须与未记录的原语连接。 如我错了请纠正我。 打开webcase是否解决了获取给定原语的文档的问题? 最好的祝福 以上来自于谷歌翻译 以下为原文 Hi, Thanks for your quick answer. As I understood, the only way to use the MCB is to use MIG. Instanciating it directly in a design is not possible since in has to be connected with undocumented primitives. Correct me if I'm wrong. Does openning a webcase solves the problem of getting the documentation for the given primitive? Best regards |
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字面答案是YES(MAYBE),您可以使用自己的代码和包装器来实例化MCB。
USEFUL的答案是否定的(哎呀!),你会疯狂地尝试避免MIG(或者你会在尝试这个过程中成为疯狂的坚果)。 您最好的选择是使用MIG生成尽可能接近您的“最终”设计的内容,然后仔细修改MIG生成的文件以完成任务。 以下是尽可能长时间坚持使用MIG的一些充分理由: 1.如果第一次无法运行,您需要技术支持吗? 2. MIG在输入到MCB状态机的参数中进行了许多详细的时序计算,而这些计算并没有为新手(使用MCB)设计人员做好充分记录。 3.仍在对MIG进行调整,以提高MCB的性能/可靠性。 如果您使用MIG,您可以重新生成核心和包装文件以赶上最新的调整。 如果您对自己的MCB +包装器实现方式的了解程度低于100%,那么您可能有机会在完成设计工作时切换到Spartan 8解决方案。 (这本来是一个笑话,而不是一种侮辱)。 那么......具体来说......你对MIG 3.5有什么问题? - 鲍勃埃尔金德 签名:新手的自述文件在这里:http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结:1。 阅读手册或用户指南。 你读过手册了吗? 你能找到手册吗?2。 搜索论坛(并搜索网页)以寻找类似的主题。 不要在多个论坛上发布相同的问题。 不要在别人的主题上发布新主题或问题,开始新的主题!5。 学生:复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。 提供有用的详细信息(请与网页,数据表链接).7。 您的代码中的评论不需要支付额外费用。 我没有支付论坛帖子的费用。 如果我写一篇好文章,那么我一无所获。 以上来自于谷歌翻译 以下为原文 The literal answer is YES (MAYBE), you might be able to instantiate the MCB with your own code and wrapper. The USEFUL answer is NO (heck no!), you would be stark raving nuts to try avoiding MIG (or you would become stark raving nuts in the process of attempting this). Your best bet is to use MIG to generate something as close as possible to what you have in mind for your 'final' design, then make careful modifications to the MIG-generated files to complete the task. Here are some good reasons to stick with MIG as long as possible: 1. You want tech support in case it doesn't work the first time? 2. Many detailed timing calculations by MIG in the parameters fed to the MCB state machines, and these calculations aren't all that well documented for the novice (with the MCB) designer. 3. Tweaks are still being made to MIG to improve performance/reliability of MCB. If you use MIG, you can regenerate the core and wrapper files to catch up with the latest tweaks. If you are less than 100% confident you know everything you NEED to know to pull off your own MCB + wrapper implementation, you may have an opportunity to switch to a Spartan 8 solution by the time you complete your design work. (that was meant to be a joke, not an insult). So... specifically... what issues do you have with MIG 3.5? - Bob Elkind SIGNATURE: README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369 Summary: 1. Read the manual or user guide. Have you read the manual? Can you find the manual? 2. Search the forums (and search the web) for similar topics. 3. Do not post the same question on multiple forums. 4. Do not post a new topic or question on someone else's thread, start a new thread! 5. Students: Copying code is not the same as learning to design. 6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please). 7. You are not charged extra fees for comments in your code. 8. I am not paid for forum posts. If I write a good post, then I have been good for nothing. |
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当然,我将在Spartan 8发布:)完成它,因为并非所有文档都可用,所以如果我采用与MIG不同的方式,我将不得不使用try& guess方法。
我对MIG没有任何问题,我通常将它用于我的内存控制器设计。 这只是“好奇心”的问题。 我观察到的一件重要事情是,Xilinx的IP内核通常不能满足我在速度方面的需求。 它们通常实现明显最流行的算法/体系结构,这对于现实生活中的设计并不总是最佳的。 有时可以花一点力气从一个$$ Virtex转移到便宜的Spartan,只需在内部制作核心并仔细选择算法/架构。 Thant为什么我有反思研究他们的现成/制造解决方案...以防万一:) 最好的祝福 以上来自于谷歌翻译 以下为原文 Of course I'll finish it at Spartan 8 release :) because not all the docs are available, so I'll have to use the try&guess method if I go another way than MIG. I haven't yet any problem with MIG, and I usually use it for my memory controller designs. That was just a matter of "curiosité". An important thing I observed is that very often IP cores from Xilinx don't always meet my needs in term of speed for example. They usually implement the obvious most popular algorithms/architectures which is not alwaysoptimal for real-life designs. Some times it's possible to spend a little effort and move from a $$ Virtex to a cheap Spartan just by making the core internally and carefully choosing algos/architectures. Thant's why I have a reflex of studying their ready/made solutions ... just in case :) Best Regards |
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在这种情况下,“不支持在MIG之外使用此块”可能非常直观。
我不希望网页提供任何额外的线索,答案。 鲍勃也提出了一些好处。 有可能,可能是的。 我会推荐它吗? 你会从技术支持中得到帮助,我想不会。 BT 以上来自于谷歌翻译 以下为原文 In this case, "The use of this block outside of MIG is not supported" is likely very literal. I woud not expect a webcase to yield any additional clues, answers. Bob makes some good points as well. It is possible, likely yes. Would I recommend it, no. Will you get help from technical support, I would think not. bt
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