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这是一个有点长的描述,所以请容忍我。
- 我们有GPIFSET到100.8兆赫。是的,比额定的速度稍快,但是使用19.2MHz晶体时的最高速度似乎是100.8 MHz(403.2/4)或89.6兆赫。我们曾希望GPIFET会因为性能原因而超频0.8%。这个问题在室温下至少在几个板上是可重复的,所以它似乎与工艺限制无关。 - 我们有一个GPIFI描述,可以用一个外部的“就绪”信号在块中传输。块等待,直到“准备”被断言,然后进行。这一直持续到整个传输完成为止。 - 由于存在此就绪信号,主机必须检查FX3,以查看当执行“写入”操作(主机到FX3到GPIF)时传输是否完成。关键是GPIFS需要一些时间来刷新DMAbuffer来真正完成传输,即使主机已经通过USB批量传输发送了所有内容。因此,主机使用供应商命令来检查FX3来检查状态。同时查询DMACMOMPLANCE状态和GPIF状态。 - 我们发现一些有趣的数据损坏问题时,执行传输,利用就绪信号,以减缓传输。值得注意的是,当这些腐败问题存在时,它们就像DRMDATAPOtiN被精确地减少了8(在我们的32位GPIFinterface上执行时,32字节)。在下一个“块”(记住,我们逐个地检查就绪信号),DRI数据指针返回到它应该的位置。因此,当发生损坏时,我们只得到坏的数据,直到块的末尾。然后一切恢复。 - 由于我们正等待GPIFTO完成,我们可以在主机上放置一个短延迟(25MS),而忽略状态检查。当我们这样做时,不会发生数据损坏。 - 事实上,即使我们在批量传输之后立即执行状态检查(USB供应商请求),但是DooToCaldMaChannGETStand,不会发生任何损坏。 - 如果设置GPIFTO 89.6 MHz,则不会发生损坏。 - 如果我们使用就绪信号传输,则不会发生损坏。据推测,这是因为在我们有机会调用DMACHANNEL GETSTATE之前,传输完成。 - 注意,所有的DMACHANNEL GETSATH都返回CYU-U3PY-PROCENIN所有的情况。我们发现有趣的是,APIGIDE要求出现错误错误的可能性,因为这种问题通常是数据共享问题的结果。没有源代码,就不可能检查,但是我们怀疑DMACHANEL GETStand可能会损坏数据指针中间传输。 - 所以我可以说我们在这里有一些事情: - 1。设置GPIFTO 89.6 MHz,并进行性能惩罚。 - 2。DooToDMACHANNEL GETSATH来确定传输完成状态。这会破坏我们的数据。相反,我们只使用CYU3PGPIFGETSMSTATE,并根据该信息确定完成。这很好,没有数据损坏。 以上来自于百度翻译 以下为原文 This is a bit long to describe so please bear with me. - We have GPIF setup to 100.8 MHz. Yes, slightly faster than it is rated to go, but the top speed when using 19.2 MHz crystal seems to be either 100.8 MHz (403.2 / 4) or 89.6 MHz. We had hoped the GPIF would run 0.8% overclocked for performance reasons. This problem is reproducible on at least a couple boards at room temperature, so it doesn't seem to be related to the process limitation.s - We have a GPIF description that can transfer in blocks with an external "ready" signal. The block waits until "ready" is asserted, then proceeds. This continues until the entire transfer is complete. - Due to the presence of this ready signal, the host must check the FX3 to see if the transfer is complete when performing a "write" operation (host to FX3 to GPIF). The point is that the GPIF needs some time to flush the DMA buffer to truly complete the transfer, even though the host has sent everything via USB bulk transfers. So the host pings the FX3 using a vendor command to check the status. Both DMA completion status and GPIF state are queried. - We found some interesting data corruption issues when performing transfers that utilize the ready signal to slow down the transfer. It's notable that when these corruption issues exist, they are as if the DR_DATA pointer has been decreased by exactly 8 (32 bytes when performing on our 32-bit GPIF interface). At the next "block" (remember, we check the ready signal on a block-by-block basis), the DR_DATA pointer is back to where it's supposed to be. So when the corruption occurs, we are only getting bad data until the end of the block. Then everything resumes. - Since we're just waiting for GPIF to complete, we can put a short delay (25ms) at the host and ignore the status check. When we do this, no data corruption occurs. - In fact, even if we perform the status check (USB vendor request) immediately after the bulk transfer, but DO NOT CALL DmaChannelGetStatus, no corruption occurs. - If we set the GPIF to 89.6 MHz, no corruption occurs. - If we DO NOT slow the transfer using the ready signal, no corruption occurs. Presumably, this is because the transfer completes before we have the opportunity to call DmaChannelGetStatus. - Note that DmaChannelGetStatus returns CY_U3P_SUCCESS in all cases. We found it interesting that the API guide calls for the possibility of a ERROR_MUTEX_FAILURE because this sort of issue is often the result of a data sharing issue. Without the sources, it's impossible to check, but we suspect there may be an issue with DmaChannelGetStatus that may be corrupting data pointers mid-transfer. - So I should say we have TWO resolutions here: - 1. Set the GPIF to 89.6 MHz and take the performance penalty. - 2. DO NOT use DmaChannelGetStatus to determine the transfer completion status. This corrupts our data. We instead use only CyU3PGpifGetSMState and determine completion from that information. This works just fine and no data corruption is seen. |
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6个回答
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满意的,
我不推荐过时钟GPIF II。如果你使用100MHz,你会看到这个问题吗? 当做, 阿南德 以上来自于百度翻译 以下为原文 Jake, I wouldn't recommend over-clocking GPIF II. Are you seeing the issue if you use 100MHz? Regards, Anand |
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我们认为这将是官方的回应。
- 不幸的是,我们不知道使用19.2MHz晶体的任何方式,并设置GPIIFTO正好100兆赫。如果你有建议,我会感兴趣的。 - 我们想用外部的100 MHz时钟来驱动GPIF,但是既然我们已经为DMACHANNEL GETSTATE BUG做了一个解决方案,我们就没有那么强烈的动机去做了。 以上来自于百度翻译 以下为原文 :) We figured that would be the official response. - Unfortunately, we're not aware of any way to use the 19.2MHz crystal and set the GPIF to exactly 100 MHz. If you have suggestions, I'd be interested. - We would like to try to drive the GPIF with an external 100 MHz clock, but since we've got a workaround for the DmaChannelGetStatus bug, we're not terribly motivated to do that. |
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嗨,卫国明,
我们有一支优秀的技术支持队伍。使用新创建的案例来查找您的病历,以了解是什么引起了这种观点。我没能得到必要的细节。 请提供病例编号细节,我想弄清这一点。 当做, 阿南德 以上来自于百度翻译 以下为原文 Hi Jake, We've a excellent tech support team. Using the new case that was created for this I tried looking up your case history to understand what caused this opinion. I was not able to get the necessary details. Please provide case number details, I want to get to the bottom of this. Regards, Anand |
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阿南德,一个例子是案例1460802838。
- 我们注意到,如果我们为32位GPIF设置IOMATRIX,我们可以使用16位GPIF或32位GPIF而不发布。此外,我们可以从16位GPIFTO切换到32位GPIFS而无问题。 - 但是,如果我们试图从32位GPIFTO 16位GPIF中切换回来,数据传输就不正确。我们被告知,16位到32 gpifis显然允许配置,但我们会需要重新配置iomatrix去32位gpifto 16bit GPIF。这是不可接受的在我们的设置需要u***to被配置,因此枚举循环和其他不良影响。 - 最后,我们有一个解决方法(如做的100.8mhz dmachannelgetstatus bug),所以我们不追求更感兴趣。但我预料的是24-72 HR反应当正确的人已经采取了两周。通过技术支持的含糊不清的答案不给我很大的信心,这些东西的真正原因已被发现。看来,2 / 16位gpifissue可能软件修正(sdkupdate),但不清楚在所有从信任的感觉让我从这个第一层的技术支持。 以上来自于百度翻译 以下为原文 Anand, an example is case #1460802838. - We are noticing that if we setup the IOMatrix for 32-bit GPIF, we can use 16-bit GPIF or 32-bit GPIF without issue. Furthermore, we can switch from 16-bit GPIF to 32-bit GPIF without issue. - However, if we then try to switch back from 32-bit GPIF to 16-bit GPIF, data transfers are not correct. We were told that 16-bit to 32-bit GPIF is apparently an allowed configuration but that we would need to reconfigure the IOMatrix to go 32-bit GPIF to 16-bit GPIF. This is not acceptable in our setup as it would require the USB to be de-configured and therefore an enumeration cycle and other undesirable effects. - In the end, we have a workaround (as with do with the 100.8 MHz DmaChannelGetStatus bug), so we aren't interested in pursuing further. But what I expected to be a 24-72 hr response when the right people are involved has take two weeks. And the vague answers by tech support don't give me much confidence that the true root cause of these things has been found. It seems that the 32-/16-bit GPIF issue could well have a software fix (SDK update), but that's not clear at all from the feeling of confidence I get from this first-layer tech support. |
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满意的,
我已经把相应的球队打平了。技术支持是我们非常重视的。我们将弄清这一点,确保你会得到更好的支持。 当做, 阿南德 以上来自于百度翻译 以下为原文 Jake, I've pinged the corresponding teams. Tech support is something we take very seriously. We'll get to the bottom of this and make sure you'll get better support. Regards, Anand |
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阿南德
你的平帮助了。今天下午接到一个电话,(出乎我们的意料)实际上陷入了一个相当困难的问题的底部。最终的结果是,对于32位,100 MHz GPIF,GPIFSOCKODITCURE()API应该调用一个突发的gt;0。 这是一个未记录的问题,但可以在API /文档的未来版本中提及。 对这一技术支持的赞誉。电话比电子邮件更快地解决了这个问题。 我们仍然需要通过我们的压力测试,但到目前为止,事情看起来很好。 以上来自于百度翻译 以下为原文 Anand-- Your ping helped. Had a phone call this afternoon and (to our surprise) actually got to the bottom of a fairly difficult issue to dig into. The end result is that for 32-bit, 100 MHz GPIF, the GpifSocketConfigure() API should be called with a burst of > 0. This is an undocumented issue, but may be mentioned in a future version of the API / documentation. Kudos to the tech support on this one. A phone call resolved this much faster than emails back and forth. We still need to put things through our stress tests, but so far things look very good. |
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