怎么在不使用API​​的情况下在Zynq上生成中断

我希望通过GIC从PL到PS中断。这里的中断发生器是AXI定时器。中断ID是61.我在Xilinx SDK中使用API​​作为独立应用程序，基于中断完成了一些任务（在ISR中定义）。
但我想使用下面的一个函数xil_out32.like与上面相同
//设置中断使能寄存器。
偏移= 0x100 + dec_to_hex（76/32 * 4）= 0x108 Xil_out32（0x2c0c1000 + 0x108,0xFFFFFFFF）;
//将ICDIPTRn寄存器设置为cpu0。
偏移= 0x800 + dec_to_hex（76/4 * 4）= 0x84c Xil_out32（0x2c0c1000 + 0x84C，0x01010101）;
//将中断配置寄存器（ICDICFR0）设置为电平敏感。
偏移= 0xC00 + dec_to_hex（76/16 * 4）= 0xC10。
hw_write（0x2c0c1000 + 0xC10,0x0）;
//优先级掩码
启用最低优先级的中断Xil_out32（0x2c0c0100 + 0x4,0xFFFF）;
//启用中断信号Xilinx_out32（0x2c0c0100 + 0x0,0x3）;
//配置分配器控制寄存器（ICDDCR）以将待处理中断发送到cpus Xilinx_out32（0x2c0c1000 + 0x000,0x1）;
因此，任何产生中断且其中断线连接到IRQS [44]的外设，GIC都会检测并将其发送到CPU0。
我的问题是
我们如何使用上述方法定义和映射ISR？



以下为原文

I want to take interrupt from PL to PS through GIC.Here interrupt generator is AXI timer.And Interrupt ID is 61.I did some tasks(defined in ISR) based on interrupt by using APIs for standalone application in Xilinx SDK.
But I want to do same as above using one function xil_out32.like below

// Set Interrupt Enable Registers. Offset = 0x100 + dec_to_hex(76/32*4) = 0x108
Xil_out32(0x2c0c1000 + 0x108, 0xFFFFFFFF);
// Set ICDIPTRn Registers to cpu0. Offset = 0x800 + dec_to_hex(76/4*4) =  0x84c
Xil_out32(0x2c0c1000 + 0x84C, 0x01010101);
// Set Interrupt Configuration Registers (ICDICFR0) to level sensitive. Offset = 0xC00 + dec_to_hex(76/16 *4) = 0xC10.
hw_write(0x2c0c1000 + 0xC10, 0x0);  
// Priority Mask. Enable interrupts for lowest priority also
Xil_out32(0x2c0c0100 + 0x4, 0xFFFF);   
// enable signaling of interrupt
Xilinx_out32(0x2c0c0100 + 0x0, 0x3);   
// Configure the Distributor Control Register (ICDDCR) to send pending interrupts to cpus
Xilinx_out32(0x2c0c1000 + 0x000, 0x1);  
So any peripheral that generates an interrupt and whose interrupt line is connected to IRQS[44] , the GIC will detect and send it to CPU0.

Here my question is
How can we define and map ISR by using above method?