怎么将相同的信号连接到总线的所有三个位

嗨，道格，
我和一位应用工程师谈过这个问题，因为我不确定这是否可能。
一般来说，Creator不支持将一个比特直接连接到总线输入信号。您看到的错误是Creator报告，ANDGATE上的输入端有未连接的信号。
我附上了一个示意图供参考。在附件中，我们使用中间逻辑来创建用于与门上的输入的总线。当您构建时，所有中间逻辑都被优化了。
假设ANDGATE上的其他输入是特定原因的总线。在这里，我们使用的引脚组件配置有3个引脚。
希望这有帮助！
Nojand和StoPiga.JPG
176.7 K



     以下为原文
  Hi Doug,
    I spoke with an Apps Engineer about this because I wasn't sure if this was possible.
    In general, Creator doesn't support directly connecting a single bit to a bus input signal. The error your seeing is Creator reporting that the input terminal on the AND gate has unconnected signals.
    I've attached a schematic image for reference.  In the attached, we used intermediate logic to create a bus for the input on the AND gate.  When you build, all this intermediate logic is optimized out.
    The assumption is that the other input on the AND gate is a bus for a specific reason.  Here, we just used a Pins component configured with 3 pins.
    Hope this helps!

•   not_and_schematic.jpg 176.7 K
  
  

很好，谢谢。
-道格



     以下为原文
  That works, thanks.
     
    -Doug