在dsPIC 33EP128GS702中DMA的位置是什么？

嗨，仔细看看外设矩阵（DS Rev）。D，第2页）：GS7*没有DMA。4个DMA通道只在GS8*上可用。



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    Hi,
have a closer look at the peripherals matrix (DS Rev. D, page 2): the GS7* have no DMA.
4 DMA channels are only available on GS8*.
Sorry for that...

对不起，D是个打印错误。应该是B。看看第2页的矩阵！这似乎是唯一的位置（除了产品页面@ MICHCHIP.com，其中DMA也未被提及）。因此，DMA章节（8）可以被认为是“有点迟钝”），因为它表示7 *衍生物，也没有DMA支持，根据第2页。



      以下为原文

    Sorry, the D was a typo. Should have been a B.
Look at the matrix on page 2! This seems to be only location (aside from the product page @microchip.com where DMA is not mentioned as well).
Thus the DMA chapter (8) could be considered "a bit sluggish") as it is denoting the 7* derivatives as well - that do not have DMA support according to page 2.

好吧，你是对的，现在我看到了，没有28个PIN部分…我把丢失的东西添加到H和GLD文件中，我可以编译，但我还没有准备好测试。有趣的是，在IFS0寄存器中，DMA的东西被删除了，但是在IEC中，它仍然在那里，像向量等等…所以，好吧，我可以提出一个支持票，或者执行一些调试-但是我需要一个串口谢谢！



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    Ok
Yeah you're right, now I see it, no 28 pins part...
I added the missing stuff into the H and GLD file and I can compile, but am not ready to test yet. Funny is, in the IFS0 register the DMA thing was removed, but in the IEC it is still in there, like the vectors etc...
 
So, well, I may raise a support ticket, or perform some debugging - but I need a serial port
 
thank you!

也许头文件也有点呆滞。不管怎样，我不希望你找到DMA的重要剩余物。用地图查找一些替换设备怎么样？我不知道你的“必须”要求…



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    Maybe a bit sluggish in the header files as well. Anyway, I do not expect you to find significant remainders of the DMA.
What about using MAPS to find some replacement device? I do not know your "must" requirements...

可能让我们看看。这不是真正的项目，我试图再次获得这件事的工作HTTP://www. MigCHIP.COM/FUMMS/M699076P2.ASPXWORD与一个更强大的PIC，而且与PCB适合原型。但是，只有在28引脚版本…没有DMA，它需要一些10-15指令获取ADC的输出，并将其存储到一个缓冲区，这意味着每个1500至200纳秒每中断。在MW范围内，我需要3mSAMS/SEC用于一些合适的FFT。当然，这只是学术性的，因为在奥地利和周围环境中基本上不再有MW和LW的电台。



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    Possibly
Let's see. It's no real project, I am trying again to get this thing working
http://www.microchip.com/forums/m699076-p2.aspx
now with a more powerful PIC and moreover with a pcb suitable for prototyping it. But only on the 28 pin version...
 
Without DMA, it takes some 10-15 instruction to fetch ADC's output and store it into a buffer, which means some 150-200nS per interrupt. I'd need 3Msamples/sec for some proper FFT in MW range...
 
Of course, this is just academic, since basically there are no longer radio stations on MW and LW in Austria and surroundings...

从DCF77和类似的开始，这些时间信号发射器都应该在LW上可用。作为F9R的28个引脚：看来你必须升级到40个+引脚。对于Excel -16，“某事”适合你的需求应该是可用的。



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    Start with DCF77 and alike - these time signal transmitters should all be available on LW.
As f9r the 28 pins: seems you'll have to upgrade to 40+ pins.
For the Explorer-16, "something" fitting your need should be available.

啊，你说得对，那就是一个开始的地方！我可以做一些44针印刷电路板，是的…



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    Ah you're right, that one can be a starting place !
 
I may make up some 44pin pcb, yeah...

让我回想一下：我正在通过DMA实现乒乓和缓冲。现在我有一个疑问…FFT函数需要Q15格式和“复杂”数据。我知道ADC已经为我提供了合适的格式，但是我仍然需要把DMAD的一组样本转换成一个真实的+虚构的部分吗？比如，在这个线程中：HTTP://www. Microchip .com /论坛/ FindPost / 820328（在CE147/CE018中由Microchip）有一个技巧在ADC（一个DSPIC33 e，但也许其他有IE），或者在DMA，可以让我获得（无论如何零）复杂的部分为每个样品？只是为了避免浪费时间…



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    Let me get back upon this :)
 
I am implementing the ping-pong and buffering via DMA. Now I have a doubt...
 
FFT functions need Q15 format and "complex" data. I know the ADC can provide me the proper format, already: but am I still in need of converting the DMA'ed bunch of samples into a real+imaginary parts?
Say, like in this thread:
http://www.microchip.com/forums/FindPost/820328
(and in CE147/CE018 by Microchip)
 
Is there a trick in the ADC (a dsPIC33E but maybe others have ie too) or in the DMA that can let me obtain the (anyway zeroed) complex part for each sample?
 
Just to avoid a waste of time...

ADC是“唯一”能够捕获“真实部分”的。假想的部分只是发挥作用，如果你运动一些I/Q采样（例如在SDR中）。基本信号理论：纯实信号的FFT只有真实的结果！我不知道微芯片LIBS是否持有这样（简单）的FFT实现。最终，你必须“剥离”虚构组件可用的FFT实现。如果你不想从头开始：这应该是一个可行的选择。



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    An ADC is "only" capable of capturing "real parts". Imaginary parts come only into play if you sport some I/Q sampling (e.g. in SDRs).
Basic signal theory: the FFT of purely real signals has only real results !
I do not know whether the Microchip libs hold such a (simpler) FFT implementation. Eventually you will have to "strip" the FFT implementation available by the imaginary component. If you do not want to start from scratch: this should be a viable option.

是的，我同意ADC，实际上我忽略了一些关于“复杂”信号的理论：像真实的和可见的功率，COSFI？好吧，无论如何，我计划在“真实”的信号，是的（等待未来的边缘事件……）所以你的主意是个好主意！把FFT代码中的复杂部分归零：现在我想知道这个源是否可用微芯片……我一直在Windows中做FFT，但是代码在PIC上工作得不好…谢谢！



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    Yep I agree about ADCs actually I am missing a bit of theory about "complex"signals: something like real and apparent power, cosfi?
Well, anyway I plan on working on "real" signals, yeah (waiting for Fringe events in the future...!)
 
So yours would be a good idea! zeroing the complex part in the FFT code: now I wonder if that source is available by Microchip...
I've been doing FFT in Windows but that code would work poorly on a PIC...
 
thank you!

是的，资源是可以的，让我们看一看…



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    Yep, sources are available let's take a look...

YEP——“复合信号”——即“表观功率”：表观功率是有源（“真实”）和无功（“虚”）功率分量的矢量和。（SDR技术中，I/Q采样只不过是在某些参考点的0, 180°处取I样本（同相）。CE时钟，Q采样（“正交信号（？）））在90和270°。如果你的ADC足够快，你可以用一个ADC来完成。在这种情况下，I和Q值将在输出数据流中交替。对于复杂的FFT来说是完美的。如果你更喜欢这个：HTTPS://E.WiKiTo.Org/Wiki/Iql失衡）



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    Yep - "complex signals" are - amongst others - the "apparent power thing": the apparent power is the vector sum of the active ("real") and the reactive ("imaginary") power components.
(In SDR technology, I/Q sampling is nothing more that taking the I-samples ("in-phase") at 0, 180 ° of some reference clock, the Q-samples ("quadrature signal (?)")at 90 and 270 °. If your ADC is fast enough, you can do this with a single ADC. In this case, I and Q values would alternate in the output data stream. Perfect for the complex FFT. ☺
If you'd love more about this: https://en.wikipedia.org/wiki/IQ_imbalance )

是啊！谢谢，谢谢。继续前进…



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    Yeah!
Perfekt, thanks. Moving on now...

知道了！44100采样，256块大小，I馈1kHz模拟波，并获得良好的结果在bin 6（170×6 Hz），这是模拟。现在我们尝试ADC和可能的DMA…



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    Got it! 44100 sampling, 256 Block-size, I feed 1KHz simulated wave and obtain a nice result in bin 6 (170*6 Hz)
 
This is simulation. Now we try with ADC and possibly DMA...

任何人都想从DSP源修改FFT.S文件，以便只使用真正的组件和归零复杂？目前我觉得我不能……这应该是核心代码要修改：…



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    Anyone feels like modifying fft.s file from DSP source, in order to use only Real component and zeroing complex? At the moment I feel like I am not able to...
 
This should be the core code to be modified:

    ; Butterfly proper.
    clr    a,[w8]+=2,w6,[w10]+=2,w4    ; a  = 0 (for dual fetch only)
                        ; w6 = Wr
                        ; pTwidd-> Wi
                        ; w4 = Ar
                        ; pUpper-> Ai (=Ci)

    push DSRPAG
    movpag #0x0001, DSRPAG

    nop
    sub    w4,[w11++],w4            ; w4 = Ar - Br
                        ; pLower-> Bi (=Di)


    pop DSRPAG

    mpy    w4*w6,a,[w8]-=2,w7,[w10]-=2,w5    ; a  = (Ar - Br)*Wr
                        ; w7 = Wi
                        ; pTwidd-> Wr
                        ; w5 = Ai
                        ; pUpper-> Ar (=Cr)
    ; Update twiddle pointer.
    add    w0,w8,w8            ; pTwidd-> for next group

    mpy    w4*w7,b                ; b  = (Ar - Br)*Wi

    push DSRPAG
    movpag #0x0001, DSRPAG
    nop


    sub    w5,[w11--],w5            ; w5 = Ai - Bi
                        ; pLower-> Br (=Dr)
    msc    w5*w7,a,[w11]+=2,w7        ; a  = (Ar - Br)*Wr
                        ;    - (Ai - Bi)*Wi = Dr
                        ; w7 = Br
                        ; pLower-> Bi (=Di)
    mac    w5*w6,b,[w11]-=2,w5        ; b  = (Ar - Br)*Wi
                        ;    + (Ai - Bi)*Wr = Di
                        ; w5 = Bi
                        ; pLower-> Br (=Dr)
    sac.r    a,#1,[w11++]            ; save 1/2*Dr
                        ; pLower-> Bi (=Di)
    sac.r    b,#1,[w11++]            ; save 1/2*Di
                        ; pLower-> Br (next)
    lac    [w10++],a            ; a  = Ar
                        ; pUpper-> Ai (=Ci)
    lac    [w10--],b            ; b  = Ai
                        ; pUpper-> Cr

...
 

我们有一些290us的256点FFT（@ 140MHz），加上大约110的复数归零和平方/矢量…我认为FFT是更快，奇怪…



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    We have some 290uS for a 256points FFT (@140MHz), plus some 110 for the complex zeroing and Square/Vectoring...
 
I was thinking FFT was faster, strange...

FFT是强的-相比于“正常”的FT。但是2×8×256乘法（粗略猜测）加上一些2×8×256的加法花费他们的时间。仍然比普通FT快得多（更像2×256×256乘法和加法）。当工作在“真实”，你可以省略平方/矢量，以及。



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    FFT is strong - compared to the "normal" FT. But 2 * 8 * 256 multiplications (gross guess) plus some 2 * 8 * 256 additions take their time. Still much faster than the normal FT (more like 2 * 256 * 256 multiplications and additions). When working on "real only", you can omit the square/vectoring as well ☺.

如果有人能帮我修改例行公事…或者稍后我会研究DSP汇编程序，是的，你说的有道理…280US发出了大约20000条指令@ 140MHz（14NSEC）：我们偏离了2倍，但还好。



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    If anyone can help me modifying the routine... or I will studi DSP assembler later
 
So yes, what you say makes sense... 280uS makes some 20000 instructions @140MHz (14nSec): we're off by a factor of 2 but ok.