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我试图使用PIT每1.7uS产生一个中断来切换GPIO,它似乎不能正常工作。 我有一个64MHz的sysclk。我使用PIT1并设置LDVAL寄存器的计数。现在计时器似乎运行良好,计数为200000,相当于5uS的中断时间。 但任何低于此值的值和定时器都不稳定(高抖动值) 更进一步的值1000000对应于1us的中断时间不起作用。 PIT似乎无法生成小于2.5us的中断。 我尝试在文件pit_lld.h中将PIT中断的优先级链接到15 以下是我的设置 #define SPC5_PIT_CH1_IRQ_PRIORITY INTC_PSR_ENABLE(INTC_PSR_CORE0_15) 这似乎也没有用。是否有任何其他设置我可以更改以使其工作? 以上来自于谷歌翻译 以下为原文 Hi I trying to use the PIT to generate an interrupt every 1.7uS to toggle a GPIO and it does not seem to be working well. I have a sysclk of 64MHz. Im using PIT1 and setting the LDVAL register with a count. Now the timer seems to be working well for a count of 200000 which corresponds to an intrerupt time of 5uS. But any value less than that and the timer is unstable (high value of jitter) Going further a value of 1000000 which corresponds to an interrupt time of 1us just does not work. The PIT does not seem to be able to generate an interrupt less than 2.5us. I tried chaining the priority of the PIT interrupt to 15 in the file pit_lld.h Below is my setting #define SPC5_PIT_CH1_IRQ_PRIORITY INTC_PSR_ENABLE(INTC_PSR_CORE0_15) This also did not seem to work. Is there any other setting that I can change to get this to work? |
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5个回答
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它是否无法以该速率生成中断,或者处理器无法堆叠上下文,并以此速率进入/退出中断。
找出处理器饱和点的位置。考虑是否有更有效的方法来硬件生成切换输出信号。 以上来自于谷歌翻译 以下为原文 Is it unable to generate interrupts at that rate, or is the processor not able to stack context, and enter/exit an interrupt at such rates. Figure out where the processors saturation point is. Consider if there are more effective ways for hardware to generate a toggling output signal. |
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我相信它可以以该速率产生中断但是进入/退出ISR是饱和点。但那只是猜测。时钟是64Mz。因此对于2us计时器而言大约132个周期。它应该能够做到。
如果这个社区中的其他人曾经不得不实施这样的练习,那么只是好奇吗? 以上来自于谷歌翻译 以下为原文 I believe it can generate interrupts at that rate but it is the entering/exiting ISR thats the saturation point. But thats just a guess. The clock is at 64Mz. So thats around 132 cycles for a 2us timer. It should be able to do it. Just curios if anyone else in this community has ever had to implement such an exercise? |
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相对较低的被贩运论坛。当你达到500 KHz时,练习是让计时器自主,并认识到如何消除抖动。
以上来自于谷歌翻译 以下为原文 Relatively low trafficked forum. When you're up at 500 KHz the exercise is to make the timer to be autonomous, and to recognize that's how to eliminate jitter. |
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>>我不确定我理解你的自主意味着什么?
让HW做HW工作。 >>一旦我能够将计时器解释到微秒内,我就可以担心抖动 好的,但我想你错过了重点。 以上来自于谷歌翻译 以下为原文 >>I'm not sure I understand what you mean by autonomous? Let HW do HW work. >>And I can worry about jitter once I can actually get the timer interpret to within a micro second Ok, but I think you miss the point. |
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你好Raghu,
你能确认使用的设备吗? 它很好SPC56P60 .. 您是否尝试更新SPC560Pxx_RLA PIT Test Application for Discovery? 最好的祝福 二万 以上来自于谷歌翻译 以下为原文 Hello Raghu , Could you confirm the device used ? it is well SPC56P60 .. Did you try to update SPC560Pxx_RLA PIT Test Application for Discovery ? Best Regards Erwan |
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