使用PIC32MX795F512H定时器3不能低于2.5us

嗨，为什么你不使用PBCH＝1:1？请看数据表中的图14-1。您可以看到应该有PBCH／1/1（预分频器）/TMR（PR）。NB：不能使用PR值＝0，因为没有产生中断（参见定时器部分FRM部分：4.3.3.1），所以如果FCH＝fCy＝80MHz和PBCH＝1:1ReGar，则应该能够以40MHz的速率产生中断。DS



      以下为原文

    Hi,
Any reason why you do not use PBclock = 1:1 ?
Look at figure 14-1 in the datasheet. You can see that it should be possible to have PBclock / 1 / 1 (prescaler) / TMR (PR).
NB : the value PR = 0 cannot be used as no interrupt is generated (see FRM for TImers section 14.3.3.1)
So you should be able to generate interrupts at a rate of 40MHz if Fclock = Fcy = 80MHz and PBclock = 1:1
Regards

嗨，没有什么特别的原因，我只是不需要在80 MHz的PBLK。我使用PLIB，这是我用来初始化我的定时器的线路：OpenTimeR3（T3YON T3SoSURCEIN T3PSPS1LY1，40）；//40/E66= 1E-6I在Time3中断中切换I/O，这样我可以在逻辑分析仪上监视它，我看到THA。我们每2.5个小时发生一次中断。如果使用高于3微秒的周期，则中断发生在正确的时间间隔。你能看出为什么会有这样的行为吗？



      以下为原文

    Hi,
 
No reason in particular, I just don't need the PBClk at 80 MHz.
 
I'm using PLIB and this is the line I use for initializing my timer:
OpenTimer3(T3_ON | T3_SOURCE_INT | T3_PS_1_1, 40); // 40 / 40e6 = 1e-6
 
I toggle an I/O in the Timer3 interrupt so I can monitor it on my logic analyzer, and I see that the interrupt occurs every 2.5 us. If I use a period higher than 3 microseconds, then the interrupt occurs at the right interval. Can you see any reason why it behaves as such?

如果你真的运行在80MHz，看起来它必须花费200个时钟周期来服务中断，所以你不能得到小于200 /80MHZ＝2.5US的间隔。或者你没有运行在80MHz。



      以下为原文

    If you are really running at 80MHz, it would seem that it must be taking 200 clock cycles to service the interrupt so you can't get intervals less than than 200/80MHz = 2.5us. Or you aren't running at 80MHz.

在定时器ISR中，我只切换一个输出并设置一个标志，所以它绝对不是200个时钟周期。根据该设备的实际频率，我很确定它是在80 MHz的系统时钟，然后是40 MHz的外围时钟。以下是我的配置位：//DeFCFG3//USERID＝PrimaMatlab配置，FSRSSEL＝PrimyTyIs7//SRS选择（SRS优先级7）（SRS=影子寄存器），Op/TraceMac配置，FMIIN＝//Ethernet RMII/MII启用（MII启用）Oracle配置文件FANKION/ON-I/O PIN选择（默认的I/O）PLL Input Divider / PrimaMac配置FuBidio= ON//USB USED选择（由USB模块控制）{ PrLulMull＝Mulr20//PLL乘法器（20X乘法器）〉PrimaMac配置LoopLi＝DIVI12//USB PLL输入分频器（12X分频器）α-PrimaMaung＝OU//USB PLL使能（禁用和旁路）α-PracMA配置FPLLoDIV= DIVIO1//系统PLL输出时钟分频器（PLL除以1）//DEVFGCPLL／FNOSCC＝FRCPLL/／振荡器选择位（带PLL的快速RC OSC）、PrimaMac配置、FSOSCEN＝OF//次级振荡器使能（禁用）在OSCO PIN（启用）//Py-PracMA配置文件FPBDIV＝DIVI8//外围时钟除数（PBY-CK是SysLCK／8）α- PrAPMA DFIDE2/ /外围时钟除数（PBH-CK是SysLCK／8）α-PrAPMA配置FCKSM＝CSDCMD/／时钟交换NG和监视器选择（时钟开关禁用，FSCM禁用）Timer Postscaler，PHT108566//看门狗（1:1048 57）），PracMA配置FFDTEN=关闭/ /看门狗定时器启用（WDT禁用（SWDTEN位控制））//DVCFG0* PracMA配置调试（OFF）/背景调试器启用（调试）“R是禁用的”（Oracle）TraceMac配置，ICESL＝ICSU-PGX2//ICE/ICD COMM信道选择（ICEUC2/EUD2引脚与PGC2/PGD2共享）OTECT（保护禁用）



      以下为原文

    In the timer ISR, I only toggle an output and set a flag, so it's definitely not 200 clock cycles.
 
As per the actual frequency of the device, I'm pretty sure it's at 80 MHz for the system clock, and then 40 MHz for the peripheral clock. Here are my configuration bits:
 
// DEVCFG3
// USERID = No Setting
#pragma config FSRSSEL = PRIORITY_7 // SRS Select (SRS Priority 7) (SRS = Shadow Registers)
#pragma config FMIIEN = ON // Ethernet RMII/MII Enable (MII Enabled)
#pragma config FETHIO = ON // Ethernet I/O Pin Select (Default Ethernet I/O)
#pragma config FCANIO = ON // CAN I/O Pin Select (Default CAN I/O)
#pragma config FUSBIDIO = ON // USB USID Selection (Controlled by the USB Module)
#pragma config FVBUSONIO = ON // USB VBUS ON Selection (Controlled by USB Module)
 
// DEVCFG2
#pragma config FPLLIDIV = DIV_2 // PLL Input Divider (2x Divider)
#pragma config FPLLMUL = MUL_20 // PLL Multiplier (20x Multiplier)
#pragma config UPLLIDIV = DIV_12 // USB PLL Input Divider (12x Divider)
#pragma config UPLLEN = OFF // USB PLL Enable (Disabled and Bypassed)
#pragma config FPLLODIV = DIV_1 // System PLL Output Clock Divider (PLL Divide by 1)
 
// DEVCFG1
#pragma config FNOSC = FRCPLL // Oscillator Selection Bits (Fast RC Osc with PLL)
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disabled)
#pragma config IESO = ON // Internal/External Switch Over (Enabled)
#pragma config POSCMOD = OFF // Primary Oscillator Configuration (Primary osc disabled)
#pragma config OSCIOFNC = ON // CLKO Output Signal Active on the OSCO Pin (Enabled)
//#pragma config FPBDIV = DIV_8 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/8)
#pragma config FPBDIV = DIV_2 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/8)
#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)
#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))
 
// DEVCFG0
#pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)
#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select (ICE EMUC2/EMUD2 pins shared with PGC2/PGD2)
#pragma config PWP = OFF // Program Flash Write Protect (Disable)
#pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)
#pragma config CP = OFF // Code Protect (Protection Disabled)

你会感到惊讶的。除非你使用IPL7SRS并直接访问SET/CLR/IVSFR（因为你还没有发布你的ISR代码，所以我们不知道也不能假设这样）即使是一个看似简单的ISR函数也能消耗上百个时钟，特别是如果你使用PLIB函数来清除标志/设置IO位。此外，在-O0，编译器往往是悲观的寄存器保存。



      以下为原文

   
You'd be surprised. Unless you are using IPL7SRS and directly access SET/CLR/INV SFR's (as you haven't posted your ISR code, we don't know and cannot assume as such) even a seemingly simple ISR function can consume hundreds of clocks, especially if you are using PLIB functions to clear flags/set IO bits. Also at -O0 the compiler tends to be pessimistic on register saving.

这里是ISR代码，我非常确信它是快速的：ValueAySISR（yTimeRe33Valpor，IPL6Auto.Time3Debug）（Bug）{dg00ToGeLeLe（）；//MpCutcToGGLeBIT（BITY13）-GT；（LATCINV=（无符号INT）（BITY13））OTime3Read＝1；//易失性BOOL/ /增加从该定时器溢出的数量。主要由输入捕获计时器.Val.NoVFrase[2 ] ++；//易失性UIT32 MT3CultIn标记（）；//PLIB宏（IFS0CLR＝IFSF0T3IFIMAGE）}，通常，Time3中断未启用，我只是使它能够探测中断的速率。当不在Time3 ISR中时，我的ADC采样仍然到达2.5Us/Chank，即使我想要1Us/Chank。我知道这是因为我在读取每个通道上的2000个样本之后切换了一个I/O，并且特定的事件发生在每70Ms而不是假定的30MS（1US×15×2000）。



      以下为原文

    Here's the ISR code, I'm pretty confident that it's fast:

void __ISR(_TIMER_3_VECTOR, ipl6auto) Timer3InterruptHandler(void)
{
  DBG0_TOGGLE();  // mPORTCToggleBits(BIT_13) -> (LATCINV = (unsigned int)(BIT_13))
  oTimer3Ready = 1;  // volatile BOOL
  // Increment the number of overflows from this timer. Used primarily by Input Capture
  Timer.Var.nOverflows[2]++;  // volatile UINT32
  mT3ClearIntFlag();  // PLIB macro (IFS0CLR = _IFS0_T3IF_MASK)
}
 
Anyways, usually, the Timer3 interrupt isn't enabled, I just enabled it to be able to probe the rate of the interrupt. When not going in the Timer3 ISR, my ADC samples were still arriving at 2.5us/channel, even though I wanted 1us/channel. I know that because I toggled an I/O after having read 2000 samples on each channel, and that specific event occured every ~70ms instead of the supposed 30ms (1us*15*2000).

看看拆卸，不要以为。



      以下为原文

    Look at the disassembly, don't assume.

ADC是如何配置的？绝对最大速率为1MS/s，时序非常紧凑，以确保在下一个触发器到达之前完成ADC。



      以下为原文

   
How have you configured the ADC?
The absolute maximum rate is 1MS/s, the timing is quite tight to ensure that the ADC is done before the next trigger arrives.

您刚刚发现MIPS体系结构的一个缺点。中断是缓慢的。PIC24／33可以在半时钟速度下更快地处理中断。但是，所有的体系结构都有一些缺点。



      以下为原文

   
You have just found one of the drawbacks of the MIPS architecture. interrupts are slow.  A PIC24/33 can handle interrupts faster at half the clock speed.  But, all architectures have some drawbacks.
 

嗨，对不起，延迟了，这是我的ADC初始化：空隙iTITADC（空）{UTI32 SPLPLIGLCK＝ADCYL CKLYTMR，ADCJUMFALATATION IGCL AutoSAMPLIGON ON；UIT32 32 BuffRADWORD＝ADCYVREXEXTIOVAVSS//VREF+外部和VREF-是AVSS AdCl SAMPLESSPARION ITE15；// 15个样本/中断UIT32 32 CON图= Enable，Anable，An2LaNa，Anable，AN3ANA，Enable，AN4ANA，Enable，AN5ANA，Enable，AN6ANA，Enable。Enable，A12BayaAnEnable，AN13ANA，Enable，AN14，ANA，Enable，AN15ANA；//启用AN1-AN1515在模拟模式UTIT32配置扫描＝SkIPySCAN，AN0；//跳过AN0，因为它是VREF+UIT32 32 CONT3＝ADCYPRONEL CLKYSY系统AdCySAMPLE TimeTime12；在OpenAdC10之上（StPulsCLK，BuffiRADWORD，CONTI3，CONTPORT，CONTIONSCIN）；EnabeLeC10（）；ADC.CONTION中断（ADCII中断优先权，ADCII中断优先权）；CONTICANDATC10（ADCGITIN OXOFFY 7 ADCYITIN子子PRIP3）；



      以下为原文

   


Hi, sorry for the delay, here's my ADC initialization:
 
void InitAdc(void)
{
  UINT32 samplingClk = ADC_CLK_TMR | ADC_FORMAT_INTG | ADC_AUTO_SAMPLING_ON;
 
  UINT32 configHardware = ADC_VREF_EXT_AVSS       // Vref+ external and Vref- is AVss
                        | ADC_SAMPLES_PER_INT_15; // 15 samples/interrupt
 
  UINT32 configPort = ENABLE_AN1_ANA
                    | ENABLE_AN2_ANA
                    | ENABLE_AN3_ANA
                    | ENABLE_AN4_ANA
                    | ENABLE_AN5_ANA
                    | ENABLE_AN6_ANA
                    | ENABLE_AN7_ANA
                    | ENABLE_AN8_ANA
                    | ENABLE_AN9_ANA
                    | ENABLE_AN10_ANA
                    | ENABLE_AN11_ANA
                    | ENABLE_AN12_ANA
                    | ENABLE_AN13_ANA
                    | ENABLE_AN14_ANA
                    | ENABLE_AN15_ANA
                    ; // Enable AN1-AN15 in analog mode

  UINT32 configScan = SKIP_SCAN_AN0; // Skip AN0 as it's vref+


  UINT32 config3 = ADC_CONV_CLK_SYSTEM | ADC_SAMPLE_TIME_12;
 
  // Open ADC with parameters above
  OpenADC10( samplingClk, configHardware, config3, configPort, configScan );

  EnableADC10();
 
  Adc.ConfigInterrupt(ADC_INTERRUPT_PRIORITY, ADC_INTERRUPT_SUBPRIORITY);
  ConfigIntADC10(ADC_INT_OFF | 7 | ADC_INT_SUB_PRI_3);
}