什么是高Z模拟或高Z数字引脚

“高Z”表示高阻抗。这是用于模拟输入，因为在那里输入阻抗可以影响信号电平（如果它太低）。



     以下为原文
  "High Z" means high impedance. This is used for analog inputs, since there the impedance of the input can affect the signal level (if it is too low).

正如HLI所说，“高Z”是模拟输入。
这里有更多关于驱动模式的信息：
当做，
罗尔夫



     以下为原文
  As hli said, "High Z" is for Analog Input.
     
    Here's more info on the drive modes:
   
    Regards,
    Rolf

当引脚作为放大器、ADC或DACS内部连接到模拟用户模块时，信号被不同地处理，并且在芯片内部完全不同的部分中被路由，而不是当引脚被连接到内部的数字信号时。HI-Z仅指输入阻抗。当与创建者2.1的用户模块路由时，你会看到不同的颜色用于电线：绿色的数字信号，橙色的模拟信号和蓝色的注释线外的芯片。
鲍勃



     以下为原文
  When a pin is internally connected to an analog usermodule as amplifiers, ADCs or DACs the signal is treated differently and routed within a completely different part of the chip than when the pin is connected to a digital signal internally. Hi-Z refers to the input impedance only. When routing with Creator 2.1 your usermodules you will see different colors used for the wires: green for digital signals, orange for analog signals and blue for annotation wires outside of the chip.
     
    Bob

高Z模拟驱动模式应用于任何引脚连接到任何模拟组件。例如ADC的输入、DAC的输出以及PGA、OPAMPs的输入和输出。
当两个逻辑电平被外部驱动时，数字输入引脚应该使用高Z数字驱动模式。例如，在UART中，RX引脚应该是高Z数字，因为TX在另一侧将驱动逻辑0以及逻辑1在线路上。
另一方面，与数字“0”和开路之间切换的开关连接的引脚不能是高Z数字。在这种情况下，当开关处于开路状态时，驱动模式应该是电阻拉高以保持逻辑“1”电平的电压。



     以下为原文
  High Z analog drive mode should be used for any pin connected to any analog component. For eg. input of ADC, output of DACs as well as input and output of PGAs, OPAMPs.
     
    High Z digital drive mode should be used for digital input pins when both logic levels are driven externally. For example, in UART, RX pin should be high z digital since TX on the other side will drive logic 0 as well as logic 1 on the line.
     
    On the other hand, a pin connected to a switch which toggles between digital '0' and open circuit can not be high z digital. In this case, the drive mode should be resistive pull up to hold the voltage at logic '1' level when switch is open circuit.

嗨，Z，你可以从早先的PIC图中看到，意思是
源和汇驱动器在销上关闭，引脚连接。
通过通往缓冲区输入的路径。所以Z是路由R+缓冲区C。从一个
交流观点。
从DC的角度来看，HZ意味着你所驾驶的一切基本上都是
泄漏电流、缓冲输入和输出图腾柱驱动器泄漏。
你必须考虑的一个警告是，如果源代码驱动程序也在解释什么？
将是管脚上的电压，因为这种情况是由泄漏控制的，并且设备
设备变化和温度效应会产生不可预知的值。简而言之
小心HiZ引脚驱动，例如，MOSFET或双极性。漏泄罐
当你不想要这种行为时，打开这些设备。因此终止一个HIZ引脚
在这样的情况下，R为Rx IlAk& lt；VTH，其中VTH是Turn.
V的外部设备。
问候，Dana。



     以下为原文
  Hi Z, as you can see from the schematic pic in earlier post, means
    the source and sink drivers are turned off at the pin, and the pin is connected
    via a route to a buffer input. So the Z is routing R + buffer C in. From an
    AC point of view.
     
    From a DC point of view HiZ means basically all you are driving/absorbing is a
    leakage current, that of the buffer input and the output totem pole driver leakages.
     
    A caution you must consider is HiZ, is if source driver is also HiZ interpreting what
    will be the voltage on the pin, as this case is controlled by leakage, and device to
    device variation and temp effects will produce unpredictable values. In short be
    careful about HiZ pins driving, for example, a MOSFET or Bipolar. Leakage can
    turn these devices on when you do not want this behaviour. So terminate a HiZ pin
    under these circumstances with an R such that R x Ileak < Vth, where Vth is turnon
    V of the external device.
     
    Regards, Dana.

所以，如果我的PSoC3连接到其他设备，比如PSoC5，现在当我复位PSoC3时，PIN会从PSoC5引脚流失一些电流，如果在复位时没有设置为高Z配置？？？？？



     以下为原文
   SO , if I have my PSOC3 connected to some other device say  PSoC5, now when i reset the PSoC3 will the pins drain some current from PSoC5 pins if not set to high Z configuration on reset????

答案是肯定的。未配置为高Z（默认值）的引脚将从其连接中接收或源电流。当复位时，引脚处于HI-Z状态，芯片的初始化开始，包括设置引脚的驱动模式和极性，这将共同占用一些毫秒。
鲍勃



     以下为原文
  The answer is YES. Pins not configured as High-Z (which is the default) will sink or source current from its connection. When resetted the pins are in Hi-Z state and the initialization of the chip starts which includes setting the pin's drive mode and polarity which will alltogether take some miliseconds.
     
    Bob

这可能有助于--CyPress？DOCID＝34818
创业与Low Power Behavior
盒外，所有GPIO引脚在模拟HI-Z状态启动，并保持在该状态，直到复位被释放。在启动时加载每个引脚的初始操作配置，并在那时生效。GPSIOS的复位行为可以在PSoC 3中使用非易失性锁存器阵列的PRTXRDM字段来改变，这些非易失性锁存器阵列是在PSoC编程时编写的。
在所有低功耗模式下，GPIO引脚保持其状态，直到部分复位或唤醒。端口中断逻辑继续在所有低功耗模式下工作，使得引脚可以用作唤醒源。
问候，Dana。



     以下为原文
  This might help -     www.cypress.com/?docID=34818
   
Startup and Low-Power Behavior



    Out of the box, all GPIO pins start up in an Analog HI-Z
state and remain in that state until reset is released. The
initial operating configuration of each pin is loaded during
boot and takes effect at that time. The reset behavior of
GPIOs can be changed in PSoC 3 using the PRTxRDM
fields of the nonvolatile latch array, which are written when
the PSoC is programmed.
   
In all low-power modes, GPIO pins retain their state until
the part is  reset or awakened. The port interrupt logic
continues to function in all low-power modes so that pins
can be used as wakeup sources.
   
Regards, Dana.

嗨，我给变量模拟输入（最大额定5V）到PSoC 5LP在高阻抗模式。现在我的问题是我可以直接给电位器输入到PSoC？在这种模式下，模拟引脚的电阻是多少？当前的伤害会是PSoC吗？
现在，作为预防措施，我已经连接了1K与锅，Psoc是采取浮动值时，我切换到接近零伏特的输入。原因是PSoC是无法检测到地面，因为这1K欧姆。
里希



     以下为原文
   Hi, Im giving variable analog input(max rating 5V) to PSoC 5lp in high impedance mode.Now my question is can I directly give the potentiometer input to PSoC?How much resistance does any analog pin provide in this mode? Will the current damage PSoC? 
    Right now as precaution i have connected 1k in series with POT,Psoc is taking floating value when i switch the input near to zero volts.The reason being psoc is unable to detect ground because of that 1k ohm.
    RISHI

请，当你有一个新的问题，问它，并打开一个新的主题。不要劫持一个年长的线程，特别是当它与你的问题无关。一个新的话题会增加你得到一个好答案的机会。
顺便说一下，通过读取PSoC5数据表，它可以模拟模拟输入的特性和它们所能承受的最大额定值。



     以下为原文
  Please, when you have a new question, ask it as such and open a new topic. Don't hijack a year-old thread, especially when it has nothing to do with your question. A new topic will increase your chance of getting a good answer.
    Btw: it can be andwered by just reading the PSoC5 data sheet, it states the properties of the analog inputs and the maximum ratings they can withstand.

只要符合VDDA & gt；= vin & gt；＝vsSA作为输入
模拟引脚可以。请参阅模块规格
模块实际上有一个小的扩展范围。输入可以
去下面的VSSA几百毫伏。
如果在这些范围之外有一个VIN，则可以通过以下方式处理：
1）通过电阻器限制电流，在数据表中注入电流的规格。
或
2）使用引脚上的夹具+ R. Schotky二极管最佳，硅二极管
在大多数设计中。
问候，Dana。



     以下为原文
  As long as you conform to ~ Vdda >= Vin >= Vssa as an input to
    an analog pin you are OK. Consult specs on module as some
    modules actually have a little expanded range. eg. inputs can
    go below Vssa a few hundred mV.
     
    If you have a Vin outside these ranges you handle this by -
     
    1) Limiting current in via a resistor, spec for injection current in datasheet.
    OR
    2) Use clamps on pins + an R. Schotky diode best, silicon diode
    in most designs.
     
    Regards, Dana.