如何使用UART FIFO？

我想答案是这里的事情太复杂了。当读取缓冲区时，标志会被清除吗？如果缓冲区大于4字节，每次读取时都会清除吗？
下面是一个“好”文档的例子，它解释了PIC MIROUART是如何处理标志的。如果我们使用第三方信息（像你的相机类比），我假设5LP也不会阻止FER比特上的接收，并通过读取接收到的数据（不管缓冲区大小）来清除。并且UART在超限错误之后停止接收，如果是，则如何清除此错误。你看PIC需要清除CRCSTA的CRIT。
我不同意你的类比，FIFO只是一个缓冲区，实际上是芯片无关的。FIFO具有UART组件的特性和QWRKS。确定FLASG的设置和清除方式，以及在错误之后组件如何处理接收。我相信，虽然一般的概念是相同的，标志的实施可以有所不同。5LP在RCTSTA寄存器中有一个CREN位吗？如果不是，那么它做什么呢？
如果你知道我的问题的答案，那么你是从哪里得到这些信息的？在UART组件数据表中是否明显？我认为不是
接收错误检测有两种类型的错误，微控制器可以自动检测。第一个被称为帧错误，当接收机在预期的时间内没有检测到停止位时发生。这样的误差通过RCSTA寄存器的FRR位来指示。如果设置了该位，则意味着最后接收的数据可能不正确。知道几件事很重要：
AfrimeRebug本身不产生中断；如果该位被设置，则最后接收的数据有错误；帧错误（位集）不阻止接收新数据；FELR位通过读取接收的数据被清除，这意味着在数据读取之前必须进行检查；比特不能被软件清除。如果需要，可以通过清除RCSTA寄存器的SPEN位来清除。它将同时导致整个EUSAT系统的复位。另一种类型的错误是CaldodoVrun错误。接收FIFO可以保存两个字符。如果接收到第三个字符，则会产生溢出错误。简单地说，没有另一个字节的空间，一个错误是不可避免的！当发生这种情况时，RCSTA寄存器的ORR位被设置。其后果如下：
已经存储在FIFO寄存器中的数据（两个字节）可以正常读取；在清除OER比特之前，将不接收额外的数据；并且该比特不被直接访问。为了清除它，有必要清除RCSTA寄存器的CREN位，或者通过清除RCSA寄存器的SPEN位来重置整个EUSAT系统。



     以下为原文
   I think the answer is what is being over complicated here. Do the flags get cleared when you read the buffer? If the buffer is greater than 4 bytes, does this get cleared each time it is read?
    Here is an example of "Good" documentation that explains how the PIC miro UART handles the flags. If we use third party info (like your camera analogy), do I assume the 5LP will also not prevent reception on FEER bit and gets cleared by reading received data (regardless of buffer size). And that the UART stops receiving after an overrun error, and if so how does this error get cleared. You see the pic needs to have the CREN bit of RCSTA cleared.
    I don't agree with your analogy and that the FIFO is just a buffer that is practically chip independant. The FIFO has characteristics and qwirks that are part of the UART component.. The way the flasg are set and cleared and how the component handles the reception after the error are determined. I am sure that though the general concept is the same, the implementation of the flags can differ. Does 5LP have a CREN bit in an RCSTA register? If not, then what does it do?
    If you KNOW, the answers to my question then where did you get the information? Is it obvious in the UART component datasheet? I think not
    Receive Error Detection

    [size=0.75em]There are two types of errors which the microcontroller can automatically detect. The first one is called Framing error and occurs when the receiver does not detect the STOP bit at the expected time. Such error is indicated via the FERR bit of the RCSTA register. If this bit is set, it means that the last received data may be incorrect. It is important to know several things:
   

    

• A Framing error does not generate an interrupt by itself;    
  
• If this bit is set, the last received data has an error;    
  
• A framing error (bit set) does not prevent reception of new data;    
  
• The FERR bit is cleared by reading received data, which means that check must be done before data reading; and    
  
• The FERR bit cannot be cleared by software. If needed, it can be cleared by clearing the SPEN bit of the RCSTA register. It will simultaneously cause reset of the whole EUSART system.   
  

    [size=0.75em]Another type of error is called Overrun Error. The receive FIFO can hold two characters. An overrun error will be generated if the third character is received. Simply, there is no space for another one byte and an error is unavoidable! When this happens the OERR bit of the RCSTA register is set. The consequences are the following:
   

    

• Data already stored in the FIFO registers (two bytes) can be normally read;    
  
• No additional data will be received until the OERR bit is cleared; and    
  
• This bit is not directly accessed. To clear it, it is necessary to clear the CREN bit of the RCSTA register or to reset the whole EUSART system by clearing the SPEN bit of the RCSTA register.   
  

我不知道你从哪里得到的寄存器和位的名字，但这通常不是我们处理的水平。另外，在你的解释中有些事情不太正确：FIFO通常是4位深的。在PSoC SCB甚至八位的情况下。清除框架错误取决于不同于使用FF、SCB和UDB实现的底层硬件。所以我的问题仍然是：你想要什么？如果它不是可接受的：为什么不编程呢？
鲍勃



     以下为原文
  I do not know where you have got the names for the registers and bits from, but this is usually not the level we deal with. Additionally there are some things in your explanation not quite right: The FIFO is normally 4 bits deep. in case of PSoC SCB even eight bits. Clearing the framing error depends on the underlying hardware which differs from using FF, SCB and UDB implementations. So the question remains for me: What do you want? And if it is not availlable: Why don't you program it?
     
    Bob

鲍勃，
你需要重新阅读我的帖子，因为你误读了我所提到的关于我所提到的特定寄存器的问题。
另外，也许可以追溯到原来的帖子。我一直在讨论创建者中的UART组件。这个组件有一个数据表，描述了可以与组件一起使用的API。其中一些涉及可以读取的错误状态标志。
在我看来，如果问题是如此的复杂和动态，那么这就是提供更好文档的理由。
NoOne可以简单地陈述标志如何或是否需要清除？？



     以下为原文
   Bob,
    you need to re-read my post again as you have misread what I was referring to regarding the specific registers I mentioned
    Also, maybe refer back to the original post. I have been discussing the UART component in Creator. This component has a datasheet that describes API's that can be used with the component. Some of these involve Error status flags that can be read. 
    It seems to me that if the issue is so dynamic and complex that this is all the more reason to provide better documentation.
    Noone can simply state how or whether the flags require clearing ??

轨道书写
例如：如果UART组件指示一个字符已准备就绪，那么我假设没有帧错误或超载吗？
正如你所写的：这是一个假设。另一个假设是：有一个字符被接收，并且有一个帧错误。因为你不能有一个没有角色的框架，所以你假设没有一个角色是错误的。
类似于一个超载情况：当你没有接收到接收到的字符时，最后一个将被送入FIFO（因为它是一个FIFO！）最早接收到的字符将被推入NyWaWa池。这是记录在数据表AFAIK（不让我搜索确切的地方）
鲍勃



     以下为原文
  Orbit wrote
    For example: If the UART component indicates a character is ready then I assume there was no frame errors or overruns?
    Exactly as you wrote: this is an assumption. The other assumption would be: there is a character received and there is a framing error. Since you cannot have a frame without a character it is quite logical that your assumption not to have a character is wrong.
    Similarily with an overrun condition: when you do not manage to pick up the characters received the last one will be fed into the fifo (because it is a FIFO!) and the earliest received character will be pushed out into the nirwana pool. This is documented in the datasheet afaik (do not let me search for the exact place)
     
    Bob

从你的帖子中，我不确定你所反映的树有哪些不同。不要说“所有的”，让我们保持它的可忽略。
然后，我们可以检查数据表的任何歧义或遗漏代码，并通知塞浦路斯。
鲍勃



     以下为原文
  From your posts I am not sure which of the tree different UARTs you are reflecting to. Do not say "all of them", let's keep it overlookable
    Then we can check that datasheet for any ambiguities or missing codes and inform Cypress.
     
    Bob

再一次。你似乎不明白。
你的PIC UART是一个特定的硬件在微控制器内。你有一个。就是这样。制造商有一个具体的操作程序。
推导了PSOC5中的UART。它确实不存在。它是由现场可编程ASIC导出的。换句话说，你不受硬件限制的限制。如果你愿意的话，你可以制作10个UART，并按照你喜欢的方式编程。



     以下为原文
  Again. You don't seem to understand.
    Your PIC UART is a specific piece of hardware within the microcontroller. You have one. That is it. There is a specific procedure built in by the manufacturer on how it operates.
    The UART in the PSOC5 is derived. It doesn't really exist. It is derived from a  field-programmable ASIC. In other words you are not limited by hardware limitations. You can make 10 UARTS if you wish and program them whichever way you like. 

UART V2.3是组件名



     以下为原文
   UART v2.3 is the component name

好吧，我放弃。似乎一个简单的答案是虚幻的。使用特定组件的API（UART V2.3）不是直截了当的。
因为组件是派生的，没有人知道标志是清除它们自己还是必须读取缓冲区来清除它们。毕竟，“派生”函数首先设置FALS，当然它们有清除它们的方法吗？
现在我明白为什么文档不够了（我假设这扩展到其他组件API），因为函数是派生出来的，我们不能说如何使用它们！！！！垃圾。



     以下为原文
   OK, I give up. It seems a simple answer is illusive. Using the API for a specific component(UART v2.3)  is not straight forward.
    Because the component is derived, no-one understands whether the flags clear themselves or you have to read the buffer to clear them. After all, the "derived" function Sets the fals in the first place, surely they have a method to clear them?
    And now I understand why the documention is not sufficient (and I assume this extends to other component API's), because the functions are derived, we cannot say how to use them!!! Rubbish.

在第17页的数据表中，我找到了UARTHAREADRXSTATUS（）的一些解释。清楚地指出哪些位是返回的，哪些位在读上是清晰的。那么，你希望看到什么更清楚的解释？
你能给我解释清楚（语言问题）你的意思是“派生”吗？
鲍勃



     以下为原文
  In the datasheet on page 17 I find some explanation for UART_ReadRxStatus(). There is clearly stated which bits are returned and which bits are clear-on-read. So what would you like to see explained more clearly?
     Could you explain for me more clearly (language problem) what you mean by "derived"?
     
    Bob

当你看UDB的描述时，你可以看到那里的FIFO。与UART组件所生成的文件进行比较，您可以看到，每个接收到的数据包首先存储在FIFO中，用户从那里检索到。为FIFO声明的缓冲区将由FIFO提供。使用外部中断时，（你的）你是负责处理所有的自己。最简单的是“循环缓冲区”和中断处理程序得到信号接收一个字节。
是的，当然是柏树执行运行如预期，但很难控制在适当的时刻，比如当一个特殊字符，接收。你的中断和组件的中断会互相干扰。
鲍勃



     以下为原文
  When you look at the descriptions of the UDB you can see the FIFOs there. Compare that to the generated files for the UART component and you see that every received packet is stored in the FIFO first from where the user retrieves it. A buffer declared for the component will be fed from the FIFO. When using the external (your) interrupt you are responsible for handling all that yourself. Easiest is the "Circular Buffer" and an interrupt handler getting signaled the receive of a single byte.
    Yes, of course does the Cypress implementation runs as expected, but it is difficult to get control at the right moment for instance when a special character is received. Your interrupt and the component's interrupt may disturb each other.
     
    Bob

你看过下面的UART组件手册吗？如果是，这个文档中缺少什么？我知道uartregisters没有记录在这，你要看巨大的psoc5lp寄存器TRM为寄存器文件。在一些柏树调查，点问题，希望他们掌握的要求。当一个人想要发展psoccomponents因为他有具体的要求，他至少在TRM文档失望…
当做，
概率神经网络



     以下为原文
  Did you read the following UART Componentmanual ? If yes, what is missing in this document ? I know that UART registers are not documented in it and you have to look at the hugly PSOC5LP Registers TRM for registers documentation. In some Cypress survey, I point the problem and I hope they have grasped the request. When one want to develop PSOC Components because he has specific requirements, he is at least disappointed by the TRM document ...
     
    Regards,
    PNN

这页显示如何使用缓冲区，缓冲区的大小是大于4？
同时，给出的例子只是读取UART，这是否意味着没有必要专门检查溢出错误和帧错误等？我没有看到使用错误检测的任何例子。
第28页为半双工操作示例。这意味着你可以设置缓冲区的大小，说2000只使用putString发出过串口大文本字符串，而不需要做什么吗？
31页的ISR的例子是使用下面的2行中读取数据，这是我们要做的阅读我们的2000字节的缓冲区？不需要错误检测吗？
ReCyStase= UARTHYXRXYRXSTATUSSYRG；
如果（ReCyStand & UpthRxrxRxStsfFIFOSO NoTimTy）
{
ReCixDATA＝UARTHARRXYRXDATAZRE；
}
给出的例子是基本的和手动显示零碎，各种功能可以从组件，但如何我们这些新的PSoC UART理解如何把一个应用程序使用中断驱动的公司具有较大的缓冲和检查以确保链路可靠性差布莱？



     以下为原文
   Which pages show how to use the buffers when buffer size is greater than 4?
    Also, the examples given simply read the uart, does this mean there is no need to specifically check for overrun errors and framing errors etc? I don't see any example of using error detection.
    Page 28 example for half duplex operation. Does this mean you can set a buffer size to say 2000 and simply use PutString to send out large text string over serial port without needing to do anything else?
    The ISR example on page 31 is using the following 2 lines to read data, is this all we need to do to read our 2000 byte buffer? And is no error detection required?
    rec_status = UART_RX_RXSTATUS_REG;
    if(rec_status & UART_RX_RX_STS_FIFO_NOTEMPTY)
    {
    rec_data = UART_RX_RXDATA_REG;
    }
    The examples given are rudimentary and the manual shows piecemeal, the various functions available from the components but how do those of us new to the PSOC UART understand how to put together an application using interrupt driven coms with larger buffers and error checking to ensure link is reliable?

为了通过UART发送，PutString负责你所需要的一切。它将阻止直到所有数据被放入TX缓冲器（无论是硬件还是软件）。
请注意，半双工模式不能使用软件TX缓冲器，因此您只限于4字节的TX缓冲器。
关于错误处理：UART组件（我们在讨论PSoC3/5？）为RX缓冲区溢出提供中断。这甚至应该应用于软件缓冲区实现。或者你还需要别的东西吗？



     以下为原文
  For sending via UART, PutString takes care of everything you need. It will block until all data is put into the TX buffer (be it hardware or software).
    Note that half-duplex mode cannot use the software TX buffer, so you are limited to 4 bytes TX buffer.
    Regarding error handling: the UART component (we are talking about PSoC3/5?) provides interrupts on RX buffer overrun. This should even apply to the software buffer implementation. Or do you need something else?

因此，我可以简单地在模型中的组件中设置TX和Rx的缓冲区大小为3000字节。
然后，只要将字符串从RAM缓冲区中的任何数据传送到3000字节，将被正确地处理和发送。
接收我所做的只是读取UART.RXBuffer（或者指定的缓冲区被命名的任何内容），就是这样吗？
我不需要编写任何特定的代码来清除标志等，因为它们都被占用了。
听起来很简单。当我为微芯片编写代码时，我们必须读取FIFO中的每个字节来清除它，并特别检查超载，因为如果我们没有，那么接收器停止，直到溢出标志被清除。很好，我不需要用PSoC来完成这一切。



     以下为原文
   So I can simply set up the buffer size for TX and RX as 3000 bytes in the component on the schematic.
    Then just putstring and any data from my Ram buffer up to 3000 bytes will be properly handled and sent.
    For receiving all I do is simply read the UART.RXBuffer (or whatever the assigned buffer gets named) and that's it?
    And I don't need to write any specific code to clear flags etc for over-run, they are all taken acre of.
    Sounds simple. When I was writing code for micro chip we had to read each byte in the fifo to clear it and specifically check for overruns because if we didn't then the receiver stopped until the overrun flag was cleared. Great that I don't need to do all this with PSOC.

唯一需要注意的是，不要读取比RX缓冲区中的字节更多的字节。因此，首先检查“大小”，这实际上是一个计数之前，你读你的数据。
鲍勃



     以下为原文
  Only thing to care for is not to read more bytes than there are in the Rx-buffer. So check first the "size" which is actually a count before you read your data.
     
    Bob

综上所述：
我放置一个UART组件并设置TX和RX缓冲区大小来表示3000
程序自动处理所有的中断。
我启动UART
接收代码会像…
nByth= uARTHEGETRXBuffelsiz（）；
如果（n字节）{
对于（i＝0；i & lt；nByl；i++）{
MYBUF[BUFPTR++] = UARTHETGETCHARE（）；
}
解析（MYBUF）；
}
//当BUFPTR随着接收和清除下一个分组的整个分组而递增
//假设每次新的字节出现，GETCHAR只从未读数据开始检索，而不是从缓冲器开始。
用于传输
UARTHIPPUT阵列（MytxBuf，3000）；



     以下为原文
   In summary:
    I place a UART component and set TX and RX buffer size to say 3000
    The program automatically takes care of all the interrupts
    I start the UART
    The receive code would be like...
    nbytes = UART_GetRXBufferSize();
    if(nBytes){
      for(i=0; i< nbytes; i++){
         myBuf[bufptr++] = UART_GetChar();
      }
      Parse(MyBuf);
    }
    //where bufptr is incremeted as entire packet being received and cleared for next packet
    //Assume each time new bytes appear that GetChar starts retrieving from unread data only and not beginning of buffer
    For transmit
    UART_PutArray(myTXbuf, 3000);

你最好使用UARTHARPT数组和UARTHETGETBEYEL并检查错误。作为一个经验法则，即使你写了一个初稿：“总是检查错误的返回”。
当做，
概率神经网络



     以下为原文
  You'd better use UART_PutArray & UART_GetByte and check for errors. As a rule of thumb even if you wrote a first draft : "always check for errors returned".
     
     
    Regards,
    PNN

不，没有像样的文档。
你应该远离增加缓冲区大小，而使用你自己的缓冲区。当然取决于你做什么。当你让组件中断做工作时，你就无法控制它。你仍然需要对数据进行排序，所以你最好自己去做。
当状态寄存器指示接收到的字节时，如果选择超过4个字节，则中断产生，并且当前FIFO中的任何字节都被转移到RXA缓冲区（您选择的大小）。
如果你选择4或更少，什么都不会发生。您需要在提供的中断中插入自己的代码，将字节移到自己的缓冲区或使用ISR（PROTO），并编写自己的例程。
在提供的中断代码中有空间用于初始化、错误检查和排序。你只需要告诉它该怎么做。
如果你select4字节或更少，你要写你自己的代码来解析字节到达。
如果您使用的是RS485设备，你需要确保你使你发射时发射针。本部分将为你做这个如果你使用它但你不使用它，确保你从事的时候发送和将其发送后。



     以下为原文
  No. No decent documentation.
    You should stay away from increasing the buffer size and instead use your own buffer. Depends on what you do of course. when you let the component interrupt do the work you have no control over it. You still have to sort the data so you might as well do it yourself.
    When the status register indicates a received byte, If you selected more than 4 bytes, the interrupt is generated and whatever byte that is in the fifo at the moment is transferred to rx_buffer(size you picked) .
    If you selected 4 or less nothing happens. You need to insert your own code in the  supplied interrupt to move the byte to your own buffer or use ISR(proto) and write your own routine.
    There is space in the supplied interrupt code for initialization, error checking and sorting. You just need to tell it what to do.
     If you select 4 bytes or less, you have to write all your own code to parse the bytes as they arrive. 
    If you are using a rs485 device, you need to make sure you enable the transmit pin when you transmit.  The component will do this for you if you use it but it you don't use it, make sure you engage it when sending and disengage it after sending.

需要检查哪些错误，简单检查错误会清除它们吗？
这就是我关于文档的意思。我看到很多关于UART的帖子，揭示了如何理解它的困惑。
所有回答帖子和提供信息的人都必须从某个地方获得信息（也许是通过尝试和错误的经验），但它似乎并不在一个地方（比如UART组件的数据表），而且似乎也没有任何真正的PSoC书籍可用。
人们会引导我去某个文档中的信息片段和其他地方的另一个片段。一旦他们理解了所有的事情是一致的，但是对于学习使用UART的人来说，想要做一些比在数据表中显示的最简单的运算（如在半双工模式下发送一个字符串而不中断）多一点，似乎就不够了。信息。
我了解到收到外面的UART组件范围数据的处理，但是当我们在谈论如何使用内置的缓存正确或是错误检查需要做，以确保可靠的通信，这个信息是不是明显的对我。



     以下为原文
   What error checking needs to be done and does simply checking the errors clear them?
    This is what I meant about documentation. I see many posts regarding UART that reveal confusion in understanding how to use it.
    All those who are answering the posts and giving information must have obtained the info from somewhere (maybe by experience of trial and error) but it does not appear to be in one place (like the datasheet for the UART component), and there don't seem to be any real PSOC books available either.
    People will guide me to a snippet of information in a certain document and another snippet somewhere else. This is fine once they understandhow everything goes together but for someone learning to use the UART and wanting to do a bit more than the simplest of aplications that are shown in the datasheet (like sending a string in half duplex mode without interrupts), there does not appear to be sufficient information.
    I understand when it comes to the PROCESSING of received data it is outside the scope of the UART component, but when we are talking about how to use the built in buffers properly or what error checking needs to be done to ensure reliable communication, this info is not obvious to me.