PROG_B始终很高

谢谢你的所有答案，
我们解决了它。
问题是3.3V电源。
它在2.5V电源供电之前启动，并不完全是直线电源。
我们改变启动顺序，问题消失了，但我不知道问题是订单还是3,3 V在启动时不是直线的。
最好的祝福。
在原帖中查看解决方案



以下为原文

Thank you for all your answer,
We solved it. The problem was the 3.3V power supply.
It start up before 2,5V power supply and it is not exactly lineal.
We change the order to start up and the problem dissapear, but I don´t know if the problem was the order or 3,3 V was not lineal in the start up. 
 
Best Regards. 
 
View solution in original post

PROG_B充当FPGA的输入。
通常我们放置RC电路，因此它可以作为复位电源。
同时应该提供跳线或按钮SW以将其拉低。
你可以在单个Triger模式下使用CRO查看PROG_B的波形。
Shantanu Sarkarhttp：//www.linkedin.com/pub/shantanu-sarkar/0/33a/335



以下为原文

PROG_B acts as Input to FPGA. Normally we put RC circuit, so it acts as a power on Reset. In parallel there should be a provision of Jumper or Push Button SW to pull it down.
You can check out the wave form at PROG_B using CRO in single Triger mode.
 
Shantanu Sarkar
http://www.linkedin.com/pub/shantanu-sarkar/0/33a/335

shantanu75写道：PROG_B充当FPGA的输入。
通常我们放置RC电路，因此它可以作为复位电源。
同时应该提供跳线或按钮SW以将其拉低。
你可以在单个Triger模式下使用CRO查看PROG_B的波形。
在大多数公司，如果你使用RC电路作为上电复位，你就会被解雇。
它们不可靠。
适当的复位监控IC成本约为四分之一，并保证可以正常工作。
除非你正在设计评估板，否则不要在这里打扰跳线/按钮。
----------------------------是的，我这样做是为了谋生。



以下为原文

shantanu75 wrote:
PROG_B acts as Input to FPGA. Normally we put RC circuit, so it acts as a power on Reset. In parallel there should be a provision of Jumper or Push Button SW to pull it down.
You can check out the wave form at PROG_B using CRO in single Triger mode.
 

At most companies, if you used an RC circuit as a power-on reset, you'd be fired. They are unreliable. A proper reset supervisor IC costs about a quarter and is guaranteed to work.
 
And don't bother with a jumper/pushbutton here, unless you're designing an evaluation board.
 
----------------------------Yes, I do this for a living.

bassman59写道：
在大多数公司，如果你使用RC电路作为上电复位，你就会被解雇。
它们不可靠。
适当的复位监控IC成本约为四分之一，并保证可以正常工作。
除非你正在设计评估板，否则不要在这里打扰跳线/按钮。
我同意你的看法，因为R和C都是临时性的，所以它更不可靠。
在我的设计中，我总是使用像MAX6723这样的监控IC，因为使用监控IC可以监控多个电压，并且可以跟踪FPGA /微处理器内部运行的程序。
现在，我更喜欢Lattice ispPAC-POWR607的电源管理器，您可以将其用作监控器和电源序列器。
在这里，我使用RC电路这个词主要是为了让他理解复位电路的基本概念，通常我们曾经在MicroprocessorDesign中使用了10年，而且仍然可以在书中找到它，甚至可以在Xilinx提供的标准评估板中找到它
。
我个人更喜欢在我的设计中保留跳线/按钮选项作为调试选项，一旦设计得到修复，我就从BOM中删除该部分。
Shantanu Sarkarhttp：//www.linkedin.com/pub/shantanu-sarkar/0/33a/335



以下为原文

bassman59 wrote:
 
At most companies, if you used an RC circuit as a power-on reset, you'd be fired. They are unreliable. A proper reset supervisor IC costs about a quarter and is guaranteed to work.
 
And don't bother with a jumper/pushbutton here, unless you're designing an evaluation board.
 

I agree with you, as R and C are temp dependent so its more unreliable. In my designs I always use Supervisory IC like MAX6723 because with Supervisory IC one can monitor more than one voltage and also can keep track on the program running inside the FPGA / Microprocessor. Now a days I prefer the Power Manager from Lattice ispPAC-POWR607, which you can use as both Supervisory as well as Power Sequenser.
 
Here I have used the phrase RC Circuit mainly to make him understand the basic concept of reset circuit, what normally we used to have 10 yr back in Microprocessor Design and still one can find it in the books or even in the standard evaluation board provided by Xilinx.
 
I personally prefer to keep the option of jumper/Pushbutton in my design as a option for debugging and once the design is fixed I remove that part from the BOM. 
 
 
 
Shantanu Sarkar
http://www.linkedin.com/pub/shantanu-sarkar/0/33a/335

Xilinx FPGA包含内部上电复位电路，因此不需要外部电路
PROG_B引脚上的电源监控器，除非您需要延迟其他一些启动
电源启动后重新断言PROG_B的原因或需要。
内部复位电路不同
从零件到零件，通常检测运行所需的所有电源的电压
配置电路可以包括Vcco轨道之一。
你可能需要延迟
如果时间配置不能保证其他Vcco轨道符合规范，则配置
完成。
我不建议直接在PROG_B线上放一个电容器
当连接PROG_B时会干扰外部编程
编程电缆（无需连接JTAG编程）。
如果引脚上的PROG_B始终为高电平，但您没有看到器件程序
可能是另一个问题。
确保MODE引脚连接正确
主串口。
检查CCLK引脚以查看配置负载是否已启动。
检查INIT_B以查看配置是否开始（INIT_B变为高电平）然后停止
（由于CRC错误，INIT_B为低电平）。
通常，您的设备的配置用户指南将更详细
有关如何连接XCF闪存部件和FPGA的信息。
HTH，
的Gabor
-  Gabor



以下为原文

Xilinx FPGA's contain internal power-up reset circuity and therefore do not need the external
power supervisor on the PROG_B pin unless you need to delay start-up for some other
reason or need to re-assert PROG_B after power is up.  Internal reset circuitry varies
from part to part and generally senses voltage on all supplies necessary to run the
configuration circuitry which may include one of the Vcco rails.  You might need to delay
configuration if other Vcco rails are not guaranteed to be in spec by the time configuration
completes.  I would not suggest putting a capacitor directly on the PROG_B line as
that would interfere with external programming when the PROG_B is connected to
a programming cable (it isn't necessary to connect for JTAG programming).
 
If PROG_B at the pin is always high, but you are not seeing the device program, there
is likely to be another issue.  Make sure that the MODE pins are tied correctly for
master serial.  Check the CCLK pin to see if the configuration load has started.
Check INIT_B to see if the configuration starts (INIT_B goes high) then stops
(INIT_B low) due to CRC errors.
 
Generally the configuration users guide for your device will have more detailed
information on how to connect the XCF flash part and the FPGA.
 
HTH,
Gabor
-- Gabor

谢谢你的所有答案，
我们解决了它。
问题是3.3V电源。
它在2.5V电源供电之前启动，并不完全是直线电源。
我们改变启动顺序，问题消失了，但我不知道问题是订单还是3,3 V在启动时不是直线的。
最好的祝福。



以下为原文

Thank you for all your answer,
We solved it. The problem was the 3.3V power supply.
It start up before 2,5V power supply and it is not exactly lineal.
We change the order to start up and the problem dissapear, but I don´t know if the problem was the order or 3,3 V was not lineal in the start up. 
 
Best Regards. 
 

多洛雷斯，
你在用什么部分？
有些Xilinx器件没有任何电源排序要求，所以我很好奇您使用的是哪一个。



以下为原文

Dolores,
 
What part are you using? Some Xilinx parts do not have any supply sequencing requirements, so I'm curious which one you used.

虽然有些部件不需要供应订单，但它们通常都是如此
要求供应量单调上升。
我认为这就是多洛雷斯所说的“直线”。
-  Gabor



以下为原文

While some parts don't have a requirement for the order of supplies coming up, they generally
require the supply to rise monitonically.  I think that's what Dolores was refering to as "lineal".
-- Gabor

我在考虑她所说的3.3V在2.5V之前上升的部分



以下为原文

I was thinking about the part where she said the 3.3V rises before the 2.5V

shantanu75写道：虽然Spartan3系列的用户指南说不需要电源序列发生器和FPGA内部有电源复位电路，只有在电压VCCINT，VCCAUX和VCCO_2变为有效后才会释放。
与此相反，它还要求关注连接到FPGA的配置器件。
正如我在之前的帖子中所说，Spartan3系列用户指南声称Spartan3在FPGA内部有一个上电复位电路。
但是当它使用一些外部Flash / PROM器件进行配置时，必须确保是否需要连接到FPGA的配置器件的任何潜在的排序要求。
在选择PROM之前，Flash PROM具有最小时间要求，如果3.3V电源是序列中的最后一个，则必须考虑此时间。
Shantanu Sarkarhttp：//www.linkedin.com/pub/shantanu-sarkar/0/33a/335



以下为原文

shantanu75 wrote:
Though the User Guide of Spartan3 family says there is no need of the Power sequencer and inside the FPGA there is the Power On Reset circuit, which gets released only after the voltages VCCINT, VCCAUX and VCCO_2 becomes valid. In contradiction to this it is also asking to take care regarding Configuration Device attached to FPGA.

As already stated in my earlier post that the User Guide of Spartan3 Family claims that Spartan3 has a Power On Reset Circuit inside the FPGA. But when it is using some external Flash/PROM Device for configurartion purpose It has to be make sure if any potential sequencing requirement of the configuration device attached to the FPGA is required or not.
Flash PROMs have a minimum time requirement before the PROM can be selected, and this time must be considered if the 3.3V supply is the last in the sequence.
Shantanu Sarkar
http://www.linkedin.com/pub/shantanu-sarkar/0/33a/335