Spartan-3配置引脚上的外部上拉电阻怎么配置？

猎人，
我个人的经验是外部Rs是可靠设计所必需的。
是的，文档中似乎存在相互矛盾的指导。
在您引用的表格中，所需的上拉始终就位并启用。
在配置指南中，以下摘录表明内部上拉不足：
这些图显示了灰色的可选组件，并指定为“NO LOAD”。
例如，比特流发生器选项ProgPin Pullup内部连接PROG_B引脚和VCCAUX之间的上拉电阻。
建议使用外部4.7kΩ上拉电阻至VCCAUX。
外部上拉提供了一个已知的上拉值，并且可以比单独的内部上拉更长，数据手册规定最高可达12kΩ。
这是需要应用一些实用工程的情况。
您可以原则上站立，也可以让问题得到解决，继续进行其他紧迫的工作。
这是一个额外的观察：上拉Rs不是真正的电阻，它们至少部分是弱电流源（即FET）。
奥斯汀一直在Xilinx工作。
如果Austin说将外部R添加到董事会，你应该听取他的建议。
如果您在FPGA配置方面遇到问题，并且希望/期望Xilinx提供技术支持，那么他们首先要问的问题之一就是您是否按照建议连接了配置引脚（参见上面的摘录）。
如果您的设计在工作台/原型上工作，但在批量生产方面存在问题，您是否真的想告诉您的同事，您试图通过从BOM中省略几个0402 R来节省5美分？
如果它让你感觉更好，那么你在问题和断言方面是100％正确的。
我100％同意你的意见。
如果你想晚上睡得很香，请遵循奥斯汀的建议。
你有更大的鱼来炒。
如果有人对原理图中额外的Rs提出质疑，请告诉他们通过潜在的成本节省来证明不需要Rs的测试是不合理的。
你的陈述中你会完全正确的。
去过也做过。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
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我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。
在原帖中查看解决方案



以下为原文

Hunter,
 
My personal experience is that the external Rs are needed for reliable design.
 
Yes, there seems to be conflicting guidance in the docs.  In the table you quote, the needed pullups are always in place and enabled.  In the config guide, the following excerpt suggests that the internal pullups are not sufficient:

The figures show optional components in gray and designated “NO LOAD”. For example,
the Bitstream Generator option ProgPin Pullup internally connects a pull-up resistor
between the PROG_B pin and VCCAUX. An external 4.7 kΩ pull-up resistor to VCCAUX is
still recommended. The external pull-up provides a known pull-up value, and can be
stronger than the internal pull-up alone, which the data sheet specifies at up to 12 kΩ.

This is a case where some pragmatic engineering needs to be applied.  You can either stand on principle, or you can put the issue to rest and move on to other pressing work.
 
Here's an added observation:  The pullup Rs are not true resistors, they are weak current sources (i.e. FETs), at least in part.
 
Austin has been working at Xilinx for about forever.  If Austin says to add the external Rs to the board, you should take his advice.
 
If you have problems with FPGA config, and you want/expect tech support from Xilinx, one of the first questions they will ask is if you have the config pins connected per the recommendations (see excerpt above).  If your design works on the bench/prototype, but has issues in volume production, do you really want to tell your colleagues that you tried to save 5 cents by omitting a few 0402 Rs from the BOM?
 
If it makes you feel any better, you are 100% right in your questions and assertions.  I agree with you 100%.  And if you want to sleep soundly at night, follow Austin's advice.  You have bigger fish to fry.  If someone questions you on the extra Rs on the schematic, tell them the testing to prove that the Rs aren't needed could not be justified by the potential cost savings.  And you would be completely correct in your statement.
 
Been there, done that.
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.View solution in original post

H，
内部上拉更弱。
4.7K至少强十倍。
Austin Lesea主要工程师Xilinx San Jose



以下为原文

h,
 
The internal pullups are much weaker.  The 4.7K is at least ten times stronger.
 
 
Austin Lesea
Principal Engineer
Xilinx San Jose

但根据此表（Spartan-3配置用户指南第65页），spartan-3（第1列）的上拉电阻甚至比4.7K更强。



以下为原文

But according to this table (Spartan-3 Configuration User Guide page 65) spartan-3 (column 1) pull-ups are even stronger than 4.7K.

H，
好吧，对于那个家庭来说，如果你不想花钱购买一个4.7K的电阻器，你可以节省几个便士。
就个人而言，我不会，因为用户指南都会显示电阻器，如果您报告问题，第一个问题就是“您是否按照用户指南中的设计进行了设计？”
如果每个电路板和所有测试都是使用额外的4.7K电阻完成的，那么为什么在所有可能的设备上使用上拉电路在所有可能的情况下完全相同？
不值得。
Austin Lesea主要工程师Xilinx San Jose



以下为原文

h,
 
OK, so for that family, if you do not want to spend the money on a 4.7K resistor, you could save a few pennys.

Personally, I would not, as the user's guides all show the resistors, and the first question you would be asked if you reported a problem would be "did you design it as shown in the user's guide?"
 
If every board, and all testing was done with additional 4.7K resistors, why take a chance that using the pullup is exactly equivalent, in all possible cases, on all possible devices?

Not worth it.
 
 
Austin Lesea
Principal Engineer
Xilinx San Jose

猎人，
我个人的经验是外部Rs是可靠设计所必需的。
是的，文档中似乎存在相互矛盾的指导。
在您引用的表格中，所需的上拉始终就位并启用。
在配置指南中，以下摘录表明内部上拉不足：
这些图显示了灰色的可选组件，并指定为“NO LOAD”。
例如，比特流发生器选项ProgPin Pullup内部连接PROG_B引脚和VCCAUX之间的上拉电阻。
建议使用外部4.7kΩ上拉电阻至VCCAUX。
外部上拉提供了一个已知的上拉值，并且可以比单独的内部上拉更长，数据手册规定最高可达12kΩ。
这是需要应用一些实用工程的情况。
您可以原则上站立，也可以让问题得到解决，继续进行其他紧迫的工作。
这是一个额外的观察：上拉Rs不是真正的电阻，它们至少部分是弱电流源（即FET）。
奥斯汀一直在Xilinx工作。
如果Austin说将外部R添加到董事会，你应该听取他的建议。
如果您在FPGA配置方面遇到问题，并且希望/期望Xilinx提供技术支持，那么他们首先要问的问题之一就是您是否按照建议连接了配置引脚（参见上面的摘录）。
如果您的设计在工作台/原型上工作，但在批量生产方面存在问题，您是否真的想告诉您的同事，您试图通过从BOM中省略几个0402 R来节省5美分？
如果它让你感觉更好，那么你在问题和断言方面是100％正确的。
我100％同意你的意见。
如果你想晚上睡得很香，请遵循奥斯汀的建议。
你有更大的鱼来炒。
如果有人对原理图中额外的Rs提出质疑，请告诉他们通过潜在的成本节省来证明不需要Rs的测试是不合理的。
你的陈述中你会完全正确的。
去过也做过。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

Hunter,
 
My personal experience is that the external Rs are needed for reliable design.
 
Yes, there seems to be conflicting guidance in the docs.  In the table you quote, the needed pullups are always in place and enabled.  In the config guide, the following excerpt suggests that the internal pullups are not sufficient:

The figures show optional components in gray and designated “NO LOAD”. For example,
the Bitstream Generator option ProgPin Pullup internally connects a pull-up resistor
between the PROG_B pin and VCCAUX. An external 4.7 kΩ pull-up resistor to VCCAUX is
still recommended. The external pull-up provides a known pull-up value, and can be
stronger than the internal pull-up alone, which the data sheet specifies at up to 12 kΩ.

This is a case where some pragmatic engineering needs to be applied.  You can either stand on principle, or you can put the issue to rest and move on to other pressing work.
 
Here's an added observation:  The pullup Rs are not true resistors, they are weak current sources (i.e. FETs), at least in part.
 
Austin has been working at Xilinx for about forever.  If Austin says to add the external Rs to the board, you should take his advice.
 
If you have problems with FPGA config, and you want/expect tech support from Xilinx, one of the first questions they will ask is if you have the config pins connected per the recommendations (see excerpt above).  If your design works on the bench/prototype, but has issues in volume production, do you really want to tell your colleagues that you tried to save 5 cents by omitting a few 0402 Rs from the BOM?
 
If it makes you feel any better, you are 100% right in your questions and assertions.  I agree with you 100%.  And if you want to sleep soundly at night, follow Austin's advice.  You have bigger fish to fry.  If someone questions you on the extra Rs on the schematic, tell them the testing to prove that the Rs aren't needed could not be justified by the potential cost savings.  And you would be completely correct in your statement.
 
Been there, done that.
 
- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

非常感谢你们提供了很好的建议。
实际上我在夏天结束时毕业，这是我的第一次FPGA体验。
我正在做这个项目作为我的研究生项目，我对额外的硬币没有任何顾虑。



以下为原文

Thanks a lot guys for great advices.
Actually I'm graduating at the end of summer and this is my first FPGA experience. I'm doing this project as my graduate project and I don't have any concerns about the extra coins.