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嗨,
我正在使用Vivado 2017.4.1在KCU116评估板上实现一个非常简单的PCIe测试设计。 在比特流生成期间,我得到如下DRC错误: [DRC RTRES-2]全局时钟网络使用本地路由资源:全局时钟网络使用本地路由资源。 1个网络至少有一个节点,其COST_CODE_NAME等于BOUNCEACROSS或INTENT_CODE_NAME等于NODE_DOUBLE,NODE_HLONG,NODE_HQUAD,NODE_SINGLE,NODE_VLONG或NODE_VQUAD。 当全局时钟网必须进入占用所有全局时钟路由资源的时钟区域时,会发生这种情况。 检查来自report_clock_utilization的报告,以确定问题网络遍历哪些时钟区域,并使用布局规划或其他物理限制来确保每个时钟区域最多占用24个全局时钟网络。 问题网是sysClock100。 时钟利用率报告(附件)的第7节表示没有使用本地时钟资源。 这个DRC错误意味着什么,我可以做些什么来生成它? 谢谢。 ClockUtilization.txt 59 KB 以上来自于谷歌翻译 以下为原文 Hi, I'm implementing a very simple PCIe test design on the KCU116 eval board using Vivado 2017.4.1. During bitstream generation I get a DRC error as follows: [DRC RTRES-2] Global clock nets are using local routing resources: Global clock nets are using local routing resources. 1 net(s) have at least one node with COST_CODE_NAME equal to BOUNCEACROSS or INTENT_CODE_NAME equal to NODE_DOUBLE, NODE_HLONG, NODE_HQUAD, NODE_SINGLE, NODE_VLONG, or NODE_VQUAD. This situation occurs when a global clock net must enter a clock region where all global clock routing resources are occupied. Check the report from report_clock_utilization to determine which clock regions are traversed by the problem net and use floorplanning or other physical constraints to ensure a maximum of 24 global clock nets occupy each clock region. The problem net(s) are sysClock100. Section 7 of the clock utilization report (attached) indicates that no local clock resources are being used. What does this DRC error mean and what might I have done to generate it? Thanks. ClockUtilization.txt 59 KB |
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你好@ marcb。
我想我发现了这个问题。 我有错误的时钟信号进入Xilinx PCIe IP模块的.sys_clk输入。 而不是.O输出源于.sys_clk_gt输入的相同IBUFDS_GTE4的.ODIV2输出,我使用的是通用全局时钟。 这会强制路由违规,因为此时钟不是.sys_clk的合法来源。 谢谢你的帮助。 我相信我现在已经过了这个问题。 斯图尔特 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 Hi @marcb. I think I found the problem. I had the wrong clock signal going into the .sys_clk input of the Xilinx PCIe IP block. Rather than the .ODIV2 output of the same IBUFDS_GTE4 whose .O output is sourcing the .sys_clk_gt input, I was using a generic global clock. This forced a routing violation since this clock is not a legal source for .sys_clk. Thanks for your help. I believe I'm past this issue now. Stuart View solution in original post |
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嗨@stuartten。
report_clock_utilization命令是否采用路由设计输入? 看起来报告的第6和第7部分没有填充,因此它可能是一个post-opt_design网表。 RTRES-2意味着路由器意外地需要使用本地资源来达到特定负载。 列出的节点是非全局的 这可能意味着路由器除了这条路径之外别无选择,但有助于查看路径。 可以使用以下命令从设备视图中选择DRC中的节点。 select_objects [get_nodes -filter {INTENT_CODE_NAME == NODE_DOUBLE || INTENT_CODE_NAME == NODE_HLONG || INTENT_CODE_NAME == NODE_HQUAD || INTENT_CODE_NAME == NODE_SINGLE || INTENT_CODE_NAME == NODE_VLONG || INTENT_CODE_NAME == NODE_VQUAD} -of [get_nets {net_name}]] 以上来自于谷歌翻译 以下为原文 Hi @stuartten. Was the report_clock_utilization command entered with a routed design? It looks as though sections 6 and 7 of the report are not populated, so it is possibly a post-opt_design netlist. The RTRES-2 would mean that the router unexpectedly needs to use local resources to reach a particular load. The nodes listed are non-global This might mean that the router had no other choice but this path, but would help to look at the path. The nodes from the DRC can be selected from the device view with the below command. select_objects [get_nodes -filter {INTENT_CODE_NAME==NODE_DOUBLE || INTENT_CODE_NAME==NODE_HLONG || INTENT_CODE_NAME==NODE_HQUAD || INTENT_CODE_NAME==NODE_SINGLE || INTENT_CODE_NAME==NODE_VLONG || INTENT_CODE_NAME==NODE_VQUAD } -of [get_nets {net_name}]] |
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嗨@ marcb,谢谢您的快速回复。
您说得对,我发送的时钟利用率报告来自合成设计。 附上,请查找从路由设计生成的新报告。 虽然后一份报告肯定有更多信息,但对我来说并不重要。 我没有看到资源利用率接近容量的任何时钟区域。 顺便说一句,你建议的查询并不富有成效。 结果如下: 警告:[Vivado 12-507]没有网络匹配'net_name'。警告:[Vivado 12-2683]没有节点匹配'get_nodes -filter {INTENT_CODE_NAME == NODE_DOUBLE || INTENT_CODE_NAME == NODE_HLONG || INTENT_CODE_NAME == NODE_HQUAD || INTENT_CODE_NAME == NODE_SINGLE || INTENT_CODE_NAME == NODE_VLONG || INTENT_CODE_NAME == NODE_VQUAD} -of [get_nets net_name]' 现在怎么办? ClockUtilizationRouted.txt 74 KB 以上来自于谷歌翻译 以下为原文 Hi @marcb, thanks for the quick response. You were right in that the clock utilization report I sent was from the synthesized design. Attached, please find a new report generated from the routed design. While this latter report certainly has more information, it doesn't mean much to me. I don't see any clock regions in which resource utilization is anywhere near capacity. BTW, the query you suggested was not fruitful. Here are the results: WARNING: [Vivado 12-507] No nets matched 'net_name'. WARNING: [Vivado 12-2683] No nodes matched 'get_nodes -filter {INTENT_CODE_NAME==NODE_DOUBLE || INTENT_CODE_NAME==NODE_HLONG || INTENT_CODE_NAME==NODE_HQUAD || INTENT_CODE_NAME==NODE_SINGLE || INTENT_CODE_NAME==NODE_VLONG || INTENT_CODE_NAME==NODE_VQUAD } -of [get_nets net_name]' What now? ClockUtilizationRouted.txt 74 KB |
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嗨@stuartten。
感谢您更新的报告。 我没有看到任何迹象表明全球资源被超额认购。 设计检查点是否可以发送? 这将进一步调查此问题。 我希望找到什么路径,以及涉及的负载。 这可能有助于确定如何解决问题。 预先路由网络“route_design -net [get_nets]”可以避免这个问题。 以上来自于谷歌翻译 以下为原文 Hi @stuartten. Thanks for the updated repot. I did not see any indication that the global resources are oversubscribed. Is the design checkpoint available to send? This would investigate the issue further. I would be looking to find what path, and what loads are involved. This might help to identify how to resolve the issue. pre-routing the net "route_design -net [get_nets |
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你好@ marcb。
我想我发现了这个问题。 我有错误的时钟信号进入Xilinx PCIe IP模块的.sys_clk输入。 而不是.O输出源于.sys_clk_gt输入的相同IBUFDS_GTE4的.ODIV2输出,我使用的是通用全局时钟。 这会强制路由违规,因为此时钟不是.sys_clk的合法来源。 谢谢你的帮助。 我相信我现在已经过了这个问题。 斯图尔特 以上来自于谷歌翻译 以下为原文 Hi @marcb. I think I found the problem. I had the wrong clock signal going into the .sys_clk input of the Xilinx PCIe IP block. Rather than the .ODIV2 output of the same IBUFDS_GTE4 whose .O output is sourcing the .sys_clk_gt input, I was using a generic global clock. This forced a routing violation since this clock is not a legal source for .sys_clk. Thanks for your help. I believe I'm past this issue now. Stuart |
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@stuartten,
感谢更新! 很高兴知道这个问题已经解决了。 你能否通过将上面的帖子标记为“接受为解决方案”来关闭此主题 --Syed -------------------------------------------------- -------------------------------------------请注意 - 请标记答案 如果提供的信息有用,请“接受为解决方案”。给予您认为有用并回复导向的帖子。感谢Kudos .------------------------ -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 @stuartten, Thanks for the update! Glad to know that the issue is resolved. Can you please close this thread by marking your above post as "Accept as Solution" --Syed --------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. --------------------------------------------------------------------------------------------- |
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