EDK 13.1地图崩溃

为什么不打开Webcase，就像错误消息所示？
------------------------------------------“如果它不起作用
模拟，它不会在板上工作。“



以下为原文

Why don't you open a Webcase, like the error message suggests?

------------------------------------------
"If it don't work in simulation, it won't work on the board."

Webcase条目不会出现在Google结果中。
此地图崩溃邮件也未出现在Google搜索结果中。
它现在。
如果/当此问题得到解决时，我将在此处更新，以便其他Xilinx工具用户知道此问题已得到修复。
这个特殊问题浪费了我几个小时的时间。
希望我能节省数小时的其他时间也浪费了。



以下为原文

Webcase entries don't appear in google results.  This map crash message also didn't appear in google results.
 
It does now.
 
If/when this issue gets resolved I'll update here so other Xilinx tool users know this problem has been fixed.  This particular problem has wasted hours of my time.  Hopefully I can save hours of others' time also being wasted.

尝试禁用global_opt。



以下为原文

Try disabling global_opt.

针对此问题提出了一个错误。
建议的解决方法是不使用global_opt或者使用Linux操作系统（如果可用），因为Linux上不会出现此问题。



以下为原文

There is a bug filed against this issue. The workarounds suggested are to not use global_opt or alternatively to use the Linux OS if  available to you as the issue does not occur on Linux.

这在14.2中仍然发生在我身上



以下为原文

This still happens to me in 14.2

尝试禁用global_opt。



以下为原文

Try disabling global_opt.

好吧，我正在使用Xilinx ISE 14.6在Linux操作系统上运行我的综合，即使禁用了优化，我也会遇到同样的错误：
命令行：map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off  -
关闭电源-o top_module_map.ncd top_module.ngd top_module.pcf使用目标部件“6slx16csg324-3”。将设计转换为LUT ...运行定向打包...运行基于延迟的LUT打包...“er”是NCD，
版本3.2，设备xc6slx16，包csg324，速度-3“re”是NCD，版本3.2，设备xc6slx16，包csg324，speed-3“rt”是NCD，版本3.2，设备xc6slx16，包csg324，速度-3Updating
计时模型...例外：Pds：Pds_PdmVccGndMgr.c：516：1.8  -  Corrupt Database.FATAL_ERROR：Map：Port_Main.h：159：1.28  - 此应用程序发现了一个无法恢复的异常情况。
有关此问题的技术支持，请访问http://www.xilinx.com/support。
设计摘要--------------错误数：1警告数：0
其他解决方法是什么？



以下为原文

Well, I'm running my synthesis on a Linux OS using Xilinx ISE 14.6 and even with the optimization disabled, I get the same error:
 
Command Line: map -intstyle ise -p xc6slx16-csg324-3 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o top_module_map.ncd top_module.ngd top_module.pcf
Using target part "6slx16csg324-3".
Mapping design into LUTs...
Running directed packing...
Running delay-based LUT packing...
"er" is an NCD, version 3.2, device xc6slx16, package csg324,
speed -3
"re" is an NCD, version 3.2, device xc6slx16, package csg324, speed
-3
"rt" is an NCD, version 3.2, device xc6slx16, package csg324, speed -3
Updating timing models...
EXCEPTION:Pds:Pds_PdmVccGndMgr.c:516:1.8 - Corrupt Database.
FATAL_ERROR:Map:Port_Main.h:159:1.28 - This application has discovered an exceptional condition from which it cannot recover. For technical
support on this issue, please visit http://www.xilinx.com/support.
Design Summary
--------------
Number of errors : 1
Number of warnings : 0
 
Other workarounds for this?

Pds_PdmVccGndMgr错误与此线程不匹配，因为它在不同阶段是致命错误。
您遇到的问题是您正在使用不支持VCC / GND网络的硬宏。
使用RPM宏和定向路由约束无法更轻松，更可靠地完成硬宏的操作很少。
布雷特



以下为原文

 The Pds_PdmVccGndMgr error is not a good match for this thread since it's a fatal error in a different phase. The problem you have is that you are using a hard macro with a VCC/GND net which isn't supported. There are few things you can do with a hard macro that can't be more easily and reliably done with an RPM macro and Directed Routing constraints.
 
Bret