在映射阶段,我得到以下关于数据总线上每个位的三态控制的错误 -
错误:打包:2531 - 双数据速率寄存器“ddr_ab / grp5_cell”无法根据需要加入“OLOGIC2”组件。
寄存器符号ddr_ab / grp5_cell的输出信号需要一般路由到结构,但寄存器只能路由到ILOGIC,IODELAY和IOB。
下面列出的是我的三态控制代码示例
ODDR2 grp5_cell(.Q(ddr_sram_ab_rdata_group5_oel),. C0(sram_clk),. C1(sram_clkinv),. CE(1'b1),. D0(sram_rdata_group5_oel),. D1(sram_rdata_group5_oel),. R(1'b0),.
S(1'b0));
IOBUF_LVCMOS25 sram_ab_data0_pad(.O(ddr_sram_ab_rdata [0]),. O(sram_ab_data [0]),. I(ddr_sram_ab_wdata [0]),. T(ddr_sram_ab_rdata_group5_oel));
我已经阅读了类似于我的消息,但没有看到有关三态控制的信息。
以上来自于谷歌翻译
以下为原文
During the map phase I am get
ting the following error pertaining to the tri-state control for each of the bits on my data bus -
ERROR:Pack:2531 - The dual data rate register "ddr_ab/grp5_cell" failed to join
the "OLOGIC2" component as required. The output signal for register symbol
ddr_ab/grp5_cell requires general routing to fabric, but the register can
only be routed to ILOGIC, IODELAY, and IOB.
Listed below is a sample of my code for the tri-state control
ODDR2 grp5_cell (.Q(ddr_sram_ab_rdata_group5_oel),
.C0(sram_clk),
.C1(sram_clkinv),
.CE(1'b1),
.D0(sram_rdata_group5_oel),
.D1(sram_rdata_group5_oel),
.R(1'b0),
.S(1'b0)
);
IOBUF_LVCMOS25 sram_ab_data0_pad (.O(ddr_sram_ab_rdata[0]),
.IO(sram_ab_data[0]),
.I(ddr_sram_ab_wdata[0]),
.T(ddr_sram_ab_rdata_group5_oel));
I have read the messages similar to mine but have not seen on concerning the tri-state control.