嗨,
我已经为内存元素生成了核心。我已经确定了它。现在我想使用xflow命令生成位文件。我在下面写了命令:
xflow -p xc4vlx25ff676-12 -synth xst_verilog.opt -imlement balanced.opt -config bitgen.opt mem32.v
我得到了以下错误:
mem.ngc无法与块合并,因为在文件中找不到块上的一个或多个引脚。
我的查询是:
1)如何为核心gen函数编写xflow命令行?
2)如何为UCF使用xflow命令???
3)我们是否需要在命令行中提及.ngc?
工具:ISE 13.1
设备:的Virtex4
mem32.v是我实例化核心模块的顶层模块。
问候,
迪帕
以上来自于谷歌翻译
以下为原文
Hi,
I have generated the core for memory element.And i have constarined it.Now i want to generate bit file using xflow command .I hvae written below command :
xflow -p xc4vlx25ff676-12 -synth xst_verilog.opt -imlement balanced.opt -config bitgen.opt mem32.v
i got the error given below:
mem.ngc cant be merged with block because one or more pins on the block were not found in the file.
my query is :
1)how to write xflow command line for core gen function??
2)how to use xflow command for UCF ???
3)Do we need to mention .ngc in the command line??
Tool:ISE 13.1
Device:Virtex4
mem32.v is the top module in which i have instantiated the core module .
Regards,
Deepa
嗨,
我已经为内存元素生成了核心。我已经确定了它。现在我想使用xflow命令生成位文件。我在下面写了命令:
xflow -p xc4vlx25ff676-12 -synth xst_verilog.opt -imlement balanced.opt -config bitgen.opt mem32.v
我得到了以下错误:
mem.ngc无法与块合并,因为在文件中找不到块上的一个或多个引脚。
我的查询是:
1)如何为核心gen函数编写xflow命令行?
2)如何为UCF使用xflow命令???
3)我们是否需要在命令行中提及.ngc?
工具:ISE 13.1
设备:的Virtex4
mem32.v是我实例化核心模块的顶层模块。
问候,
迪帕
以上来自于谷歌翻译
以下为原文
Hi,
I have generated the core for memory element.And i have constarined it.Now i want to generate bit file using xflow command .I hvae written below command :
xflow -p xc4vlx25ff676-12 -synth xst_verilog.opt -imlement balanced.opt -config bitgen.opt mem32.v
i got the error given below:
mem.ngc cant be merged with block because one or more pins on the block were not found in the file.
my query is :
1)how to write xflow command line for core gen function??
2)how to use xflow command for UCF ???
3)Do we need to mention .ngc in the command line??
Tool:ISE 13.1
Device:Virtex4
mem32.v is the top module in which i have instantiated the core module .
Regards,
Deepa
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