[问答]

Rockchip如何读取当前DDR和GPU频率？

1541 RK3288

问答对人有帮助，内容完整，我也想知道答案 0 Rockchip如何读取当前DDR和GPU频率？ 0
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答案对人有帮助，有参考价值 0 < > Platform: Rockchip OS: Android 6.0 Kernel: 3.10.92 ddr和gpu的clock都受dvfs模块管控, 所以只要执行: root@rk3288:/ # cat /sys/dvfs/dvfs_tree kernel log中打印出来: [ 2264.928913] DVFS TREE: [ 2264.928977] \| [ 2264.928977] \|- voltage domain:vd_gpu [ 2264.929069] \|- current voltage:1150000 [ 2264.929125] \|- current regu_mode:UNKNOWN [ 2264.929199] \| \| [ 2264.929199] \| \|- power domain:pd_gpu, status = OFF, current volt = 1150000, current regu_mode = UNKNOWN [ 2264.929423] \| \| \| [ 2264.929423] \| \| \|- clock: clk_gpu current: rate 480000, volt = 1150000, enable_dvfs = ENABLE [ 2264.929550] \| \| \|- clk limit(enable):[99000000, 480000000]; last set rate = 480000 [ 2264.929624] \| \| \| \|- freq = 99000, volt = 900000 [ 2264.929689] \| \| \| \|- freq = 198000, volt = 900000 [ 2264.929751] \| \| \| \|- freq = 297000, volt = 950000 [ 2264.929814] \| \| \| \|- freq = 417000, volt = 1050000 [ 2264.929877] \| \| \| \|- freq = 480000, volt = 1150000 [ 2264.929949] \| \| \|- clock: clk_gpu current: rate 480000, regu_mode = UNKNOWN, regu_mode_en = 0 [ 2264.930019] \| [ 2264.930019] \|- voltage domain:vd_logic [ 2264.930105] \|- current voltage:1100000 [ 2264.930161] \|- current regu_mode:UNKNOWN [ 2264.930231] \| \| [ 2264.930231] \| \|- power domain:pd_vio, status = OFF, current volt = 1100000, current regu_mode = UNKNOWN [ 2264.930348] \| \| \| [ 2264.930348] \| \| \|- clock: aclk_vio1 current: rate 410000, volt = 1100000, enable_dvfs = ENABLE [ 2264.930463] \| \| \|- clk limit(enable):[82000000, 410000000]; last set rate = 410000 [ 2264.930534] \| \| \| \|- freq = 82000, volt = 1100000 [ 2264.930597] \| \| \| \|- freq = 410000, volt = 1100000 [ 2264.930670] \| \| \|- clock: aclk_vio1 current: rate 410000, regu_mode = UNKNOWN, regu_mode_en = 0 [ 2264.930753] \| \| [ 2264.930753] \| \|- power domain:pd_ddr, status = OFF, current volt = 1100000, current regu_mode = UNKNOWN [ 2264.930868] \| \| \| [ 2264.930868] \| \| \|- clock: clk_ddr current: rate 396000, volt = 1100000, enable_dvfs = ENABLE [ 2264.930982] \| \| \|- clk limit(enable):[200000000, 528000000]; last set rate = 396000 [ 2264.931053] \| \| \| \|- freq = 200000, volt = 1050000 [ 2264.931116] \| \| \| \|- freq = 300000, volt = 1050000 [ 2264.931178] \| \| \| \|- freq = 396000, volt = 1100000 [ 2264.931239] \| \| \| \|- freq = 528000, volt = 1150000 [ 2264.931309] \| \| \|- clock: clk_ddr current: rate 396000, regu_mode = UNKNOWN, regu_mode_en = 0 [ 2264.931379] \| [ 2264.931379] \|- voltage domain:vd_arm [ 2264.931464] \|- current voltage:900000 [ 2264.931519] \|- current regu_mode:UNKNOWN [ 2264.931588] \| \| [ 2264.931588] \| \|- power domain:pd_core, status = OFF, current volt = 900000, current regu_mode = UNKNOWN [ 2264.931701] \| \| \| [ 2264.931701] \| \| \|- clock: clk_core current: rate 126000, volt = 900000, enable_dvfs = ENABLE [ 2264.931814] \| \| \|- clk limit(enable):[126000000, 1608000000]; last set rate = 126000 [ 2264.931885] \| \| \| \|- freq = 126000, volt = 900000 [ 2264.931947] \| \| \| \|- freq = 216000, volt = 900000 [ 2264.932008] \| \| \| \|- freq = 312000, volt = 900000 [ 2264.932222] \| \| \| \|- freq = 408000, volt = 900000 [ 2264.932290] \| \| \| \|- freq = 600000, volt = 900000 [ 2264.932353] \| \| \| \|- freq = 696000, volt = 950000 [ 2264.932415] \| \| \| \|- freq = 816000, volt = 1000000 [ 2264.932478] \| \| \| \|- freq = 1008000, volt = 1050000 [ 2264.932542] \| \| \| \|- freq = 1200000, volt = 1100000 [ 2264.932604] \| \| \| \|- freq = 1416000, volt = 1200000 [ 2264.932667] \| \| \| \|- freq = 1512000, volt = 1300000 [ 2264.932729] \| \| \| \|- freq = 1608000, volt = 1350000 [ 2264.932801] \| \| \|- clock: clk_core current: rate 126000, regu_mode = UNKNOWN, regu_mode_en = 0 [ 2264.932870] -------------DVFS TREE END------------

2022-3-3 11:51:49 评论举报王媛媛