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如果我有一个引脚连接到一个原理图符号(比如一个SPI主块,例如),我能力销到一个给定的状态(高,低,三态)通过单独的软件,或者我要添加一个控制登记和复用的原理吗?
我的用例是一个SPI主机和外部部件和组件有一些非常具体的设置要求,没有SPI。我想把SPI MOSI引脚然后给销回”的SPI模块正常SPI通讯一旦我的外部组件已初始化。 我看了看通过销数据和得到的代码生成的,但我没有看到这样做。添加一个多路复用器和控制登记似乎是一个非常“做这个重”的方式。 以上来自于百度翻译 以下为原文 If I have a pin connected to a schematic symbol (say a SPI Master block, for example), can I force the pin to a given state (high, low, tri-state) through software alone, or do I have to add a control register and mux to the schematic to do this? My use case is a SPI Master talking to an external component, and the component has some very specific setup requirements that are not SPI. I'd like to wiggle the SPI MOSI pin and then "give the pin back" to the SPI module for normal SPI communications once my external component has been initialized. I took a look through the pin datasheet and the resultant code generated, but I didn't see a way to do this. Adding a MUX and control register seems to be an awfully "heavy" way to do this. |
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2个回答
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再次回答我自己的问题:
查看架构TRM,CyPress给出了GPIO块的框图。(第19.2页第144页,例如5LP)。它专门调用MUX周围的寄存器名,进入驱动逻辑块。PRT[X] BYP控制GPIO引脚是否从DSI或端口的数据寄存器PRT[x] DR获得其输出电平。 如果PIN的示意符号已经正确设置,您就不需要摆弄PRT[x] DM(驱动模式)或PRT[X] BIE(双向控制)寄存器。在PRT[x] DM中写入正确的位的逻辑电平,并将PRT[X] DR位翻转到“0”。当您完成并希望外围设备重新接通时,将PRT [X] DM位设置为“1”,以便PIN从DSI获取其逻辑电平。 这些寄存器的内存地址是在(难读的)登记时间。 以上来自于百度翻译 以下为原文 Answering my own question (again): Looking at the Architecture TRM, Cypress gives a block diagram of the GPIO blocks. (section 19.2 on page 144 for the 5LP, for example). It specifically calls out the register names surrounding the MUX leading into the drive logic block. PRT[x]BYP controls whether the GPIO pin takes its output level from the DSI or the port's data register PRT[x]DR. If the schematic symbol for the pin is already set up correctly you should not need to fiddle with the PRT[x]DM (drive mode) or PRT[x]BIE (bidirectional control) registers. Write the logic level you want to put on the pin to the correct bit in PRT[x]DM and flip PRT[x]DR bit to '0'. When you're done and want the peripheral to take over again, set the PRT[x]DM bit to '1' so the pin takes its logic level from the DSI. The memory addresses for these registers is in the (very difficult to read) Register TRM. |
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这可能是赞成的。
HTTP://www. CyPress?COM/?RID=57571 问候,Dana。 以上来自于百度翻译 以下为原文 This might be of assitance - http://www.cypress.com/?rID=57571 Regards, Dana. |
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