如何实现两个PSOC1芯片同步工作

设置一个芯片在引脚上有一个12 MHz的时钟输出。将此信号路由到另一设备上的P1.4，在PSoC设计器中选择外部时钟源。
丹尼斯



     以下为原文
  Set one chip to have a clock output at 12 MHz on a pin. Route this signal to P1.4 on the other device, select external clock source in PSoC Designer.
    ---- Dennis

你能同时在两个不同的芯片上执行同一个程序吗？如果是这样，则需要它们之间的同步特性，因为它们可能不是完全并行的，所以有一些不可计算的延迟。
如果你告诉我们更多关于你想要完成的事情，我们可能会更好地帮助你。
鲍勃



     以下为原文
  Can it be that you want to execute the same program simultanously on two different chips? If so, you'll need a synchronization feature between them, since they may not startup perfectly parallel, there are some uncalculatable delays.
    If you tell us a bit more about what you want to accomplish we might help you better.
     
    Bob

如果你想要一个真正同步的处理器，就像医学中使用的一样。
药物输送应用，您需要一个复位引脚控制
启动内部CPU状态机，当然没有模拟
数字进程驱动逻辑，除非重新同步。
PSoC 1启动是由外部电压VDD斜坡内部控制的。
所以只需要一个低抖动时钟并将两个PSoC设置为外部时钟
不够。如果您希望它们同时执行相同的代码
及时点。
HTTP://www. CyPress？COM/？RID＝58522 AN73617
正如鲍伯所说，对你要做的事情有更确切的描述。
乐于助人。
问候，Dana。



     以下为原文
  If you wanted a truly synched pair of processors, like used in medical
    drug delivery applications, you would need a reset pin that controls
    startup of the internal CPU state machine, and of course no analog
    to digital processes driving logic, unless re-synched.
     
    PSOC 1 startup is internally controlled from external voltage Vdd ramp.
    So to just take a low jitter clock and set both PSOCs to external clock would
    not suffice. Thats if you want them both executing the same code at the same
    point in time.
     
        
              
    http://www.cypress.com/?rID=58522      AN73617
     
    As Bob stated, a more definitive description of what you are trying to do would
    be helpful.
     
    Regards, Dana.

谢谢你的回复。我想同步操作两个PSoC芯片的CAPSENSE模块（时钟，屏蔽信号是同相）。够清楚了吗？



     以下为原文
   Thanks for the response. I want to operate Capsense modules of both PSOC chips in synchronization (clock, shield signal are to be in phase). Is that clear enough?

由于CapSense不是一个被动的过程，而是一个活跃的，其中一些C被充电和测量，一个PSoC芯片将影响其他当使用CAPSENSE在相同的按钮/滑块上。此外，不能保证两个PSoCs都从复位同步器中出来。所以你的解释还不够。剩下的问题是：这两个PSoC背后的想法是什么？
鲍勃



     以下为原文
  Since CapSense is not a passive process but an active one where some C is charged and measured one PSoC chip will influence the other when using CapSense on the same buttons / sliders. Additionally it will not be guaranteed that both PSoCs come out of reset synchron. So your explanation will not be enough. The remaining question is: What is the idea behind those two PSoCs, what job ( mission are you trying to accomplish this way?
     
    Bob