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你好,
当我使用光纤测试2 spartan605评估板之间的通信时,我遇到了一些问题。 使用Core Generator,我配置了Aurora 8B / 10B v8.3,线速率为2.5Gbps,参考时钟为125MHz。 参考时钟由125 MHz板载振荡器产生。(由25MHz板载振荡器倍增) 然后我将example_design下载到spartan 605.每个Spartan605在传输和接收时都是“channel_uped和lane_uped”。但是当我把光纤放在它们之间并想要通信时,我丢失了channel_up和lane_up.And使用 chipcope,我可以获得“channel_up”和“lane_up”始终为零。 我猜是问题是两个参考时钟有偏差还是其他一些原因。 你能帮助我并给我一些建议吗? 谢谢 ! 以上来自于谷歌翻译 以下为原文 Hello, I have caught with some problems when I test the communication between 2 spartan605 evaluation board using fiber. Using Core Generator,I have config Aurora 8B/10B v8.3 with the line rate 2.5Gbps and the reference clock 125MHz. The reference clock is generated by the 125 MHz onboard crystal oscillator.(Multipled by the 25MHz onboard crystal oscillator ) And then I download the example_design to the spartan 605. Each Spartan605 is "channel_uped and lane_uped"when transmited and received by itself.But when I put the fiber between them and want to communicate , I have lost the channel_up and the lane_up.And using chipscope, I could get the "channel_up" and "lane_up" is always zero. I guess whether the problem is the two reference clocks have deviation or some other reason. Could you help me and give me some suggestion? Thank you ! |
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请验证以下AR http://www.xilinx.com/support/answers/40399.htmdebug清单帖子。
它有助于验证默认跳线和开关位置,并找出电路板问题(如果存在) _______________________________________________如果有助于解决您的查询,请将此帖子标记为“接受为解决方案”。 因此,它将有助于其他论坛用户直接参考答案。如果您认为该信息有用且面向答复,请给予此帖子称赞。 以上来自于谷歌翻译 以下为原文 Please verify the following AR http://www.xilinx.com/support/answers/40399.htm debug checklist posts. It helps in verifying default jumpers and switch positions and to find out board problems (if exists) ________________________________________________ Please mark this post as an "Accept as solution" in case if it helped to resolve your query. So that it will help to other forum users to directly refer to the answer. Give kudos to this post in case if you think the information is useful and reply oriented. |
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你好,Kodali,
感谢您的回复。我已经尝试了您的建议,并将开关和跳线设置为默认值。 然后我在esch sp605上尝试ibert,我发现全循环模式(无,近端pcs,近端pma,远端pcs,远端pma)可以将“MGT Link Status”带到“Link” “以2.5Gbps线路速率运行时。 然后我在每个sp605上尝试了gtwizard example_design,通过chipcope,我可以获得在附件中发布的aregular模式的error_count增加。 在两个相邻的错误之间,时间是512个时钟。 但是“rxbufstatus”,“rxclkcorcnt”。“rxbyteralign”,......正如预期的那样表示。 我是MGT的新手,你能帮我一把,给我一些建议吗? 谢谢 ! 科比刘 以上来自于谷歌翻译 以下为原文 Hello,Kodali, Thank you for your reply.I have tryed your suggestion and put the switch and jumper to their default value. Then I try the ibert on esch sp605 and i found that the all loop mode(none, near-end pcs, near-end pma, far-end pcs, far-end pma) can bring the "MGT Link Status" to "Link" when running at 2.5Gbps Line Rate. Then I tried the gtwizard example_design on each sp605,through the chipscope, I can get the error_count increase in a regular pattern as posted in Attachments. Between the two adjacent error , the time is 512 clocks. But the "rxbufstatus","rxclkcorcnt"."rxbyteralign",..is indicated right as expected. I am a newbie in the MGT, can you give me a hand and give me some suggestions? Thank you ! Kobe Liu |
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两个不同的板有两个不同的参考时钟。
您是否使用时钟校正来解释PPM差异? ------您是否尝试在Google中输入问题? 如果没有,你应该在发布之前。太多结果? 尝试添加网站:www.xilinx.com 以上来自于谷歌翻译 以下为原文 Two different boards with two different reference clocks. Are you using clock correction to account for PPM differences? ------Have you tried typing your question into Google? If not you should before posting. Too many results? Try adding site:www.xilinx.com |
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