CY7C67200与FPGA接口却无法获得正确的CY3663硬件版本

你好。我用的是DE2-115 FPGA。我正在尝试为CY7C6200编写我自己的固件。我完成了ISP1362的写作，然后Trasic改变了DARN芯片。
我很难读取默认值。我正在尝试阅读0xC04的硬件版本。它应该是0x0101+修改次数。我相信芯片是修订版A，所以它是+0，改正？当我读取值时，我得到0xC08。
地址是否随芯片选择而改变？这个地方有FPGA的例子吗？我很难理解地址状态（地址、数据、邮箱、状态）之间的差异。
如有任何帮助，将不胜感激。我一直在阅读CY3663的文档，但似乎没有什么能让我相信我做的是正确的。
谢谢
-乔



     以下为原文
  Hi.  I'm using the DE2-115 FPGA.  I'm trying to write my own firmware for the CY7C67200.  I finished writing for the ISP1362 and then TerAsic changed the darn chip.
    I'm having difficulty reading default values.  I am trying to read the hardware revision at 0xC004.  It should be 0x0101 + the number of revisions.  I believe the chip is revision A, so that would be +0, correctl?  When I  read the value, I get 0xC008.
    Does it matter if the address changes with Chip Select?  Is there an FPGA example on this anywhere? I'm having difficulty understanding the difference between the address states (address, data, mailbox, status).  
     
    Any help would be greatly appreciated.  I've been reading the documents from CY3663, but nothing seems to give me confidence that I'm doing it correctly.
     
    Thanks
    -Joe