[问答]

如何使用Spartan 6和CoolRunner II进行从串行模式配置？

问答对人有帮助，内容完整，我也想知道答案 0 我正在设计包含CoolRunner II XC2C64A-7VQG100I和Spartan 6 XC6SLX45-2CSG324C的硬件。我正在设计能够为配置存储器添加内存模块的电路板。这样做我选择了从串口模式配置。在Spartan 6配置数据表中，它给出了创建它的示例原理图。问题是CoolRunner II没有SERIAL_OUT，PROGRAM_B，DONE或INIT_B引脚。当我查看菊花链配置指南时，它说Virtex 5和Spartan 6能够通过CPLD或微控制器进行配置，但它只讨论了Coolrunner II如何配置Virtex 5，但它没有说明配置斯巴达6.有什么帮助吗？以上来自于谷歌翻译以下为原文 I'm designing hardware containing the CoolRunner II XC2C64A-7VQG100I and the Spartan 6 XC6SLX45-2CSG324C. I'm designing the board with the ability to be able to add memory modules for configuration memory. In doing so I choose the slave serial mode configuration. In the Spartan 6 configuration datasheet it gave a example schematic for creating it. The problem is that the CoolRunner II doesn't have SERIAL_OUT, PROGRAM_B, DONE, or INIT_B pins. When I checked the daisy chaining configuration guide it said that the Virtex 5 and Spartan 6 were capable of being configured via CPLDs or microcontrollers but it only talked about how the Coolrunner II could configure the Virtex 5 but it didn't say anything about it configuring the Spartan 6. Any help? 0
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答案对人有帮助，有参考价值 0 shs2017写道：我正在设计包含CoolRunner II XC2C64A-7VQG100I和Spartan 6 XC6SLX45-2CSG324C的硬件。我正在设计能够为配置存储器添加内存模块的电路板。这样做我选择了从串口模式配置。在Spartan 6配置数据表中，它给出了创建它的示例原理图。问题是CoolRunner II没有SERIAL_OUT，PROGRAM_B，DONE或INIT_B引脚。当我查看菊花链配置指南时，它说Virtex 5和Spartan 6能够通过CPLD或微控制器进行配置，但它只讨论了Coolrunner II如何配置Virtex 5，但它没有说明配置斯巴达6.有什么帮助吗？ CPLD没有这些信号，因为它通过内部闪存配置自身（使用JTAG编程）。您打算如何处理CPLD？年龄前，我使用CPLD在从串行模式下配置XC4000系列FPGA。如果您打算使用CPLD配置FPGA，您仍需要为FPGA配置提供某种非易失性存储。该存储由CPLD读取，然后CPLD驱动FPGA的配置线。阅读器要弄清楚如何将FPGA配置映像编程到非易失性存储器中，这是一个练习... ----------------------------是的，我这样做是为了谋生。以上来自于谷歌翻译以下为原文 shs2017 wrote: I'm designing hardware containing the CoolRunner II XC2C64A-7VQG100I and the Spartan 6 XC6SLX45-2CSG324C. I'm designing the board with the ability to be able to add memory modules for configuration memory. In doing so I choose the slave serial mode configuration. In the Spartan 6 configuration datasheet it gave a example schematic for creating it. The problem is that the CoolRunner II doesn't have SERIAL_OUT, PROGRAM_B, DONE, or INIT_B pins. When I checked the daisy chaining configuration guide it said that the Virtex 5 and Spartan 6 were capable of being configured via CPLDs or microcontrollers but it only talked about how the Coolrunner II could configure the Virtex 5 but it didn't say anything about it configuring the Spartan 6. Any help? The CPLD doesn't have those signals because it configures itself from internal flash (which is programmed using JTAG). What do you intend to do with the CPLD? Ages ago I used a CPLD to configure XC4000-series FPGAs in slave-serial mode. If you are going to use the CPLD to configure the FPGA, you still need to have some sort of non-volatile storage for the FPGA configuration. That storage is read by the CPLD which then drives the FPGA's configuration lines. It is an exercise left to the reader to figure out how to program the FPGA configuration image into that non-volatile storage ... ----------------------------Yes, I do this for a living.

2019-7-2 11:17:23 评论举报黄淳