请问这种选择会影响路由资源吗？

嗨，
我在置于SP-605演示板上的FPGA Spartan-6 LX45T的引脚分配上遇到了麻烦。
我还使用调试卡XM-105。
我看到SP-605文档中的UCF文件分配了同一个存储区中的连续FMC pinstoFPGA引脚，但它们在FPGA中并不严格相邻。
例如，如果我们考虑12个引脚，4个位于存储区0的左侧，4个位于中心，另外4个位于存储区的右侧。
这种选择会影响路由资源吗？
如果可以，我可以非常密切地选择所有FPGA引脚。
这不是很重要吗？
问题＃2：我有2个输入信号，每个信号10位。
它们有一些“交叉”处理（例如，一个用于另一个的倍增）。
如果我在相同的引脚对上分配同源位（信号A到XXX_P引脚的第i位和信号B到第XXX_N引脚的第i位），路由是否更好？
谢谢！



以下为原文

Hi,

I'm in trouble on the pin assignment on FPGA Spartan-6 LX45T placed on the demoboard SP-605. I use also the debug card XM-105. I see that the UCF file present in SP-605 documentation assigns consecutive FMC pins to FPGA pins that are in the same bank but they are not strictly adjacent in FPGA. For example, if we consider 12 pins, 4 are on the left of bank 0, 4 at the center and the other 4 are at the right of the bank. Will this choice impact on the routing resources? If I could I have chosen all the FPGA pins very closely. Is this not so important?

Question #2: I have 2 input signals of 10 bits each. They have some "cross" processing (for example multiplication of the one for the other). Is it better for the routing if I assign the homologous bits on the same pin pair (i-th bit of signal A to XXX_P pin and i-th bit of signal B to XXX_N pin)?

Thank you!