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你好,
我试图使用FMPLL作为系统时钟,但我得到了一个我没想到的行为。作为软件基础,我使用了SPC56xL发现板的测试应用程序。当我以正确的方式理解时钟配置时,该项目使用16MHz内部RC运行。我在文件hal_lld.h中找到了配置,所有模式都使用内部RC,例如: / ** * @brief DRUN模式设置。 * / #if!defined(SPC5_ME_DRUN_MC_BITS)||定义(__ DOXYGEN__) #define SPC5_ME_DRUN_MC_BITS(SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON | SPC5_ME_MC_PLL0ON | SPC5_ME_MC_PLL1ON | SPC5_ME_MC_FLAON_NORMAL | SPC5_ME_MC_MVRON) #万一 / ** * @brief RUN0模式设置。 * / #if!defined(SPC5_ME_RUN0_MC_BITS)||定义(__ DOXYGEN__) #define SPC5_ME_RUN0_MC_BITS(SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON | SPC5_ME_MC_PLL0ON | SPC5_ME_MC_PLL1ON | SPC5_ME_MC_FLAON_NORMAL | SPC5_ME_MC_MVRON) #万一 在第一步中,我将SPC5_ME_MC_IRCON更改为SPC5_ME_MC_XOSC,该工作正常。用调试器查看ME_GS寄存器向我显示,S_SCLCLK的XOSC值为0b0010。但是当我尝试使用FMPLL时,该寄存器仍然显示控制器使用内部RC。如何激活和使用FMPLL作为系统时钟? 接下来的问题是,我必须在hal_lld.c文件中注释此函数中的while循环: bool_t halSPCSetRunMode(spc5_runmode_t mode){ / *清除状态寄存器位I_IMODE(4)和I_IMTC(1)。* / ME.IS.R = 5; / *启动转换过程。* / ME.MCTL.R = SPC5_ME_MCTL_MODE(模式)| SPC5_ME_MCTL_KEY; ME.MCTL.R = SPC5_ME_MCTL_MODE(模式)| SPC5_ME_MCTL_KEY_INV; 返回OSAL_SUCCESS; } / *等待模式切换或错误状态。* / / * while(TRUE){ uint32_t r = ME.IS.R; if(r& 1) 返回OSAL_SUCCESS; 如果(r& 4) 返回OSAL_FAILED; } * / 原因是,我有一个自行设计的控制器板与SPC56EL60。我尝试了与已经在发现板上工作的相同的软件,但它没有用。似乎模式开关永远不会完成,因为控制器永远停留在这个while循环中。取消注释while循环后,我现在可以使用内部RC或外部振荡器(40Mhz,如发现板上)运行程序。可能是什么原因? 希望有人可以帮助我或给我一个很好的提示,如何找到我的问题的答案。 最好的祝福, 帕特里克 以上来自于谷歌翻译 以下为原文 Hello, I tried to use the FMPLL as system clock, but I get a behaviour which I did not expect. As software basis, I used the test application for the SPC56xL discovery board. When I understand the clock configuration in the right way, this project runs with the 16MHz internal RC. I found the configuration in the file hal_lld.h, all modes are using the internal RC for example here: /** * @brief DRUN mode settings. */ #if !defined(SPC5_ME_DRUN_MC_BITS) || defined(__DOXYGEN__) #define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON | SPC5_ME_MC_PLL0ON | SPC5_ME_MC_PLL1ON | SPC5_ME_MC_FLAON_NORMAL | SPC5_ME_MC_MVRON) #endif /** * @brief RUN0 mode settings. */ #if !defined(SPC5_ME_RUN0_MC_BITS) || defined(__DOXYGEN__) #define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | SPC5_ME_MC_IRCON | SPC5_ME_MC_XOSC0ON | SPC5_ME_MC_PLL0ON | SPC5_ME_MC_PLL1ON | SPC5_ME_MC_FLAON_NORMAL | SPC5_ME_MC_MVRON) #endif In the first step, I changed the SPC5_ME_MC_IRCON to SPC5_ME_MC_XOSC which worked. Looking at the ME_GS register with the debugger shows me, that the S_SYSCLK has the value 0b0010 for XOSC. But when I am trying to use the FMPLL, this register still shows me that the controller uses the internal RC. How can I activate and use the FMPLL as system clock? Next question is, that I had to comment the while loop within this function in the file hal_lld.c: bool_t halSPCSetRunMode(spc5_runmode_t mode) { /* Clearing status register bits I_IMODE(4) and I_IMTC(1).*/ ME.IS.R = 5; /* Starts a transition process.*/ ME.MCTL.R = SPC5_ME_MCTL_MODE(mode) | SPC5_ME_MCTL_KEY; ME.MCTL.R = SPC5_ME_MCTL_MODE(mode) | SPC5_ME_MCTL_KEY_INV; return OSAL_SUCCESS; } /* Waits for the mode switch or an error condition.*/ /* while (TRUE) { uint32_t r = ME.IS.R; if (r & 1) return OSAL_SUCCESS; if (r & 4) return OSAL_FAILED; }*/ The reason was, that I have a self designed controller board with the SPC56EL60. I tried the same software as already worked on the discovery board, but it did not work. It seems, that the mode switch is never completed, because the controller stays in this while loop forever. After uncommenting the while loop, I am now able to run the program with either the internal RC or the external oscillator (40Mhz, as on the discovery board). What could be the reason for that? Hope somebody can help me or give me a good hint how to find the answers to my questions. Best regards, Patrik |
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4个回答
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嗨,
学习参考手册和使用调试器指出了我的问题的可能原因。当我正确理解模式切换过程时,当每个时钟源被检测为稳定时,模式转换结束。在我的例子中,寄存器ME_GS告诉我,系统PLL,辅助PLL和辅助系统时钟源不稳定。此外,ME_DMTS寄存器中的SCSRC_SC和SYSCLK_SW位向我显示正在发生状态变化并且系统时钟源切换正在等待。 这可能是硬件错误的结果吗? 最好的祝福, 帕特里克 以上来自于谷歌翻译 以下为原文 Hi, Studying the reference manual and using the debugger points me a possible reason for my problem. When I understand the mode switching procedure correctly, then the mode transition is finished when every clock source is detected as stable. In my case, the register ME_GS shows me, that the System PLL, Secondary PLL and Secondary system clock source are not stable. Furthermore, the bits SCSRC_SC and SYSCLK_SW in the ME_DMTS register show me that a state change is taking place and a system clock source switching is pending. Could this be the result of an hardware error? Best regards, Patrik |
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嗨,
很可能是硬件问题,FMPLL必须在某些参数范围内工作,有关详细信息,请参阅DataSheet。确保所有频率都在限制范围内。 SPC5Studio提供的演示已使用FMPLL作为时钟源并具有正确的设置。 一个常见错误是尝试将应用程序移植到具有不同xtal频率的电路板而不更改PLL输入分频器,结果是PLL无法稳定,因为VCO被迫超出其限制。 将应用程序移植到新板时所需的步骤是: 1)复制演示应用程序(项目浏览器中的crtl-c,ctrl-v,它会提示输入新名称)。 2)执行电路板组件中的设置(xtal频率和I / O)。 3)更改驱动程序组件中的初始化设置,如果某个频率超出范围,则会出现编译时错误)。 4)完成后,您可能需要更改demo main()中的LED名称。 乔瓦尼 以上来自于谷歌翻译 以下为原文 Hi, Most likely an HW problem, the FMPLL has to work within certain parameters, see the DataSheet for details. Make sure that all frequencies are within limits. The demos provided with SPC5Studio already use the FMPLL as clock source and have correct settings. One common error is to try to port an application to a board with a different xtal frequency without changing the PLL input divider, the result is the PLL unable to stabilize because the VCO is forced to work outside its limits. The steps required when porting an application to a new board are: 1) Duplicate a demo application (crtl-c, ctrl-v in the project explorer, it prompts for a new name). 2) Do the settings in the board component (xtal frequency and I/Os). 3) Change the initialization settings in the drivers component, if some frequency is out of bounds you get compile-time errors). 4) Done, you may have to change LED names in the demo main(). Giovanni |
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再说一遍。
停留在该循环中的CPU可能意味着您的外部振荡器或xtal未正确启动,需要检查。 乔瓦尼 以上来自于谷歌翻译 以下为原文 Just another note. The CPU staying in that loop may mean that your external oscillator or xtal is not starting properly, something to check. Giovanni |
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你好Giovanni,
谢谢你的帮助,这是一个硬件问题。 VDD_LV_PLL0_PLL引脚的外部接线有问题。在模式切换的情况下,PLL无法提供稳定的时钟信号。更改布局后,软件按预期工作并在演示板上进行测试。 最好的祝福, 帕特里克 以上来自于谷歌翻译 以下为原文 Hello Giovanni, Thank you for your help, it was a hardware issue. There was something wrong with the external wiring of the VDD_LV_PLL0_PLL pin. In case of a mode switch, the PLL was not able to provide a stable clock signal. After changing the layout, the software works as expected and tested on the demo board. Best regards, Patrik |
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