使用S6 CES设计克隆保护有好的建议吗？

我本来可以把它发布到一个知识产权论坛，但我认为Xilinx社区中最优秀，最聪明的（以及最快速的梳妆台）都在斯巴达论坛中徘徊......
我的第一个自筹资金产品基于S6 LX16部件，配备Atmel SPI闪存。
我想保护我的设计（以及我未来的生计）免受克隆。
我手边的CES部件不支持DNA，但Atmel SPI闪存部件确实有一个独特的32位序列号。
这是我到目前为止设计的方案：
一阶保护是简单地将唯一的序列号复制到SPI闪存中的可读位置，一次只能在首次上电时复制一次。
对于后续的“启动”，FPGA会读取并比较SPI序列号和SPI序列号的副本。
复制的序列号可以与其他SPI内容一起克隆，但无法克隆本机序列号。
这个方案有什么问题？
我的目标是让克隆变得足够困难，以阻止一个淘汰艺术家。
我没有让设计“安全”远离国家安全局或东欧黑客群体的妄想，我太小了，不能为那些人炒鱼。
作为我的设计师的一个注释，我确实在论坛和各种Xilinx白皮书上搜索了这个主题。
实施“终极解决方案”的两个最大障碍是缺少板载DNA，缺少板载闪存（S3AN）。
提前感谢您的建议！
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

I could have posted this to an IP forum, but I think the best and the brightest (as well as the snappiest dressers) of the Xilinx community all hang out here in the Spartan forum...

My first self-funded product is based on S6 LX16 parts, with Atmel SPI flash for config.  I would like to protect my design (and my future livelihood) from cloning.  The CES parts I have on hand do not support DNA, but the Atmel SPI flash parts do have a unique 32bit serial number.

Here's the scheme I've devised so far:

First order protection is to simply copy the unique serial number to a readable location in the SPI flash, once and only once at first power-up.  For subsequent 'boots', the FPGA reads and compares the SPI serial number and the copy of the SPI serial number.  The copied serial number can be cloned along with the rest of the SPI contents, but the native serial number cannot be cloned.

What can go wrong with this scheme?  My goal is to make cloning just difficult enough to deter a knock-off artist.  I don't have delusions of keeping the design 'safe' from the NSA or the East Europe hacker crowd, I'm too small a fish to fry for those folks.

As a note to my fellow designers, I have indeed searched the forums and the various Xilinx white papers on the subject.  The two biggest impediments to implementing the "ultimate solution" are lack of onboard DNA, and lack of onboard flash (a la S3AN).

Thanks for your suggestions, in advance!

-- Bob Elkind
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README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

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