请问将VCCO连接到2.7V是完全安全的吗？

我想使用最少数量的监管机构。
但我认为在电路板上添加3.3V LDO将是最安全的解决方案，“我晚上可以睡得好”。
现在我要将VCCO_4,5与2.5V和其他VCCO连接到3.3V。
在原帖中查看解决方案



以下为原文

I wanted to use a minmum number of regulators. But I think adding a 3.3V LDO to the board will be the safest solution and "I can sleep well at night ".
 
Now I'm gonna tie VCCO_4,5 to 2.5V and other VCCOs to 3.3V.
View solution in original post

H，
如果您保持在建议的工作电压范围内，则保证所有规格。
如果您在其他任何地方开展业务，则无法保证。
Spartan 3的IO从1.14到3.65v运行（见下面的链接）。
因此，在该范围内的任何地方，IO都可以工作。
对于任何特定的IO标准，如LVCMOS 2.5v，如您所述，还有一个限制是满足所有保证的规范。
如果您的其他设备的Vcc为2.7v，
http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf
表31显示Vccaux的推荐最大电压为2.625v，如果您只有一个电源，则意味着Vcco也必须为2.625v（因为您只需要一个电源来运行所有电源）。
您的其他设备是否会以2.625v运行？
这样可以避免出现任何错误，因此您还应该查看电源的容差（+/-？），并考虑到电路板之间的任何不准确性。
Austin Lesea主要工程师Xilinx San Jose



以下为原文

h,

If you stay within the recommended operating voltages, all the specifications are guaranteed.

If you operate anywhere else, there are no guarantees.

The IOs for Spartan 3 operate from 1.14, to 3.65v (see below link).  So anywhere in that range, the IOs will work.  For any particular IO standard, like LVCMOS 2.5v, there is a further restriction, as you note, for meeting all guaranteed specifications.
 
If you have other devices which operate with a Vcc of 2.7v,
 
http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf
 
Table 31, shows that the recommended max voltage for Vccaux is 2.625v, which if you have only one supply, means the Vcco will also have to be 2.625v (as you only have that one supply to run everything).  Will your other devices run at 2.625v?
 
This leaaves no room for any error, so you should also look at the tolerance of the supply (+/-?) and also account for any inaccuracies from board to board.
 
 
 
 
Austin Lesea
Principal Engineer
Xilinx San Jose

奥斯汀的建议，如果我可以获得许可解释，是这样的：
如果您使用数据表VCCO，数据表的Vin和Vout数字是有保证的。
奥斯汀的建议并不排除使用2.7V（标称值）VCCO会导致您的设计崩溃的可能性，这只是意味着您可以自己向自己证明2.7V VCCO可以在您的应用中正常工作
。
作为一个实际的设计工程师，有时候他太急于挑战权威和过度的过度设计，我不会“欺骗”并偷工减料（是的，有时我会被这种倾向所灼烧）。
所以带上一粒盐......
选项1：
检查连接到FPGA的LVCMOS25器件的Vin和Vout规格。
你有很多噪音？
如果将VCCO提升至2.7V（请记住，您的标称2.7V电源可能会向上或向下变化2-3％），可能的结果是FPGA的Vin和Vout（标称值）规格将向上倾斜大约10
％。
您可能会发现FPGA与连接的LVCMOS25器件之间仍有足够的噪声容限。
这里的假设是高于规格的“2.5V”VCCO轨道不会引起任何器件压力或损坏（可能是一个安全的假设，因为FPGA VCCO轨和IO可以处理标称的3.3V信号系统）。
您还必须考虑LVCMOS25器件的器件限制 - 它们的输入可以处理2.7V（标称）信号而无需器件故障。
注意：作为LVCMOS信号系统的实际问题，VOL不随VCCO（或VDD）变化。
VOH应随VCCO而变化，这会随着VCCO（或VDD）的升高而增加噪声容限。
您最可能的噪声容限是FPGA中的VIH。
如果以GND / VSS为参考，您无后顾之忧。
如果这是一个与VCCO（VDD）成比例的分压器，那么您可能会看到VIH阈值比数据表值高150mV。
S3数据表暗示LVCMOS25 VIH阈值以GND / VSS为参考，但这种推断通常会产生误导。
选项＃2：
您的LVCMOS器件可以处理2.7V VDD吗？
如果是这样，请考虑在2.7V标称VDD下运行所有​​LVCMOS器件，以匹配应用于FPGA的2.7V VCCO。
通过单独运行FPGA（VCCO）2.7V，可以保留信号噪声容限（在FPGA和外部元件之间）。
不利的一面是，2.5V与2.7V的噪声容限“命中”现在转移到您可能连接到“LVCMOS27”器件的任何LVCMOS25器件上。
选项＃3a：
将肖特基二极管插入2.7V电源，将其降低200-300 mV，并将其用于FPGA的VCCO。
这是一个候选设备（低音量小于10美分），您可能需要添加一些电阻负载以确保最小电流消耗（和电压降）。
选项＃3b：
如果2.7V电源是板上和本地电源，只需添加一个低成本的低电流线性寄存器，从电源为2.7V电源产生合法的2.5V VCCO电源（或使用本地3.3V电源，如果
有一个可用）。
低成本时成本为25美分，另外还有10美分上限，200mA（300mA峰值）。
有很多便宜而小巧的LDO线性稳压器，您可以随意寻找最适合您应用的线性稳压器。
我相信还有更多的可能性，这些是一些“简单”的。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
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以下为原文

Austin's advice, if I may take license to interpret, is this:

If you use the datasheet VCCO, the datasheet Vin and Vout numbers are guaranteed.

Austin's advice doesn't preclude the possibility that using a 2.7V (nominal) VCCO will cause your design to collapse in a heap, it just means you are on your own to prove to yourself that a 2.7V VCCO will work OK in your application.
 
As a practical design engineer who is sometimes too eager to defy authority and excessive over-design, I am wont to 'cheat' and cut corners (and yes, sometimes I've been burnt by this tendency).  So take this with a grain of salt...
 
Option #1:
Check the Vin and Vout specs of the LVCMOS25 devices connected to the FPGA.  Do you have lots of noise margin?  If you bump VCCO up to 2.7V (keep in mind that your nominal 2.7V supply may vary by 2-3% up or down), the likely result is that the FPGA's Vin and Vout (nominal) specs will skew upwards by around 10%.  You may find that there is still ample noise margin between the FPGA and the connected LVCMOS25 devices.  The presumption here is that a higher-than-spec '2.5V' VCCO rail will not cause any device stress or damage (probably a safe presumption, since the FPGA VCCO rails and IOs can handle nominal 3.3V signaling systems).  You must also consider the device limits of the LVCMOS25 devices -- can their inputs handle 2.7V (nominal) signaling without device breakdown.

NOTE:  As a practical matter with LVCMOS signaling systems, VOL does not vary with VCCO (or VDD).  And VOH should vary with VCCO, which would increase noise margin with an elevated VCCO (or VDD).  Your most likely noise margin concern is VIH in the FPGA.  If this is referenced to GND/VSS, you have no worries.  If this is a divider proportional to VCCO (VDD), then you are likely to see a VIH threshold which is 150mV higher than datasheet values.  The S3 datasheet implies that the LVCMOS25 VIH threshold is referenced to GND/VSS, but such inferences are often misleading.

 
Option #2:
Can your LVCMOS devices handle a 2.7V VDD?  If so, consider running all of your LVCMOS devices at 2.7V nominal VDD to match the 2.7V VCCO applied to the FPGA.  This preserves the signaling noise margin (between the FPGA and the external components) you would concede by running the FPGA alone (VCCO) at 2.7V.  The downside is that the 2.5V vs. 2.7V noise margin 'hit' now moves to whatever LVCMOS25 devices you might have connected to your 'LVCMOS27' devices.
 
Option #3a:
Stick a Schottky diode in the 2.7V supply to drop it by 200-300 mV, and use this for your FPGA's VCCO.  Here's a candidate device (less than 10 cents in low volume), you may need to add some resistive load to ensure a minimum current draw (and voltage drop).
 
Option #3b:
If the 2.7V supply is on-board and local, just add a low-cost low-current linear reg to generate a legal 2.5V VCCO supply from the supply which powers the 2.7V supply (or use a local 3.3V supply, if there's one available).  Cost is 25 cents in low volume, plus another 10 cents in caps, good for 200mA (300mA peak).  There are plenty of cheap and tiny LDO linear regulators to be had, feel free to look around for one which fits your application best.
 
I'm sure there are many more possibilities, these are a few 'easy' ones.
 
- Bob Elkind
 
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非常感谢您提供的优质信息和建议。
我不确定2.7V器件在2.625V是否会好，因为它的数据表标志着VCC为2.7V至5V。
用于I / O的LVCMOS25 mximum Vin为VCCO + 0.3，FPGA是唯一工作在2.5v的器件。
另一个CMOS器件是工作在2.7V的uC。



以下为原文

Thanks a lot for the great info and advices.
 
I'm not sure if the 2.7V device will be fine at 2.625V since its datasheet marks 2.7V to 5V for VCC.
 
The LVCMOS25 mximum Vin for I/Os is VCCO+0.3 and the FPGA is the only device working at 2.5v. The other CMOS device is a uC working at 2.7V.

hunter555persia写道：...
我不确定2.7V器件在2.625V是否会好，因为它的数据表标志着VCC为2.7V至5V。
另一个CMOS器件是工作在2.7V的uC。
2.7V器件和uC都能在3.3V下工作吗？
你有（你有）一个运行在3.3V的IO银行吗？
2.5V器件（或功能等效器件）可以在3.3V下运行吗？
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
阅读手册或用户指南。
你读过手册了吗？
你能找到手册吗？2。
搜索论坛（并搜索网页）以寻找类似的主题。
不要在多个论坛上发布相同的问题。
不要在别人的主题上发布新主题或问题，开始新的主题！5。
学生：复制代码与学习设计不同.6“它不起作用”不是一个可以回答的问题。
提供有用的详细信息（请与网页，数据表链接）.7。
您的代码中的评论不需要支付额外费用。
我没有支付论坛帖子的费用。
如果我写一篇好文章，那么我一无所获。



以下为原文

hunter555persia wrote:
... I'm not sure if the 2.7V device will be fine at 2.625V since its datasheet marks 2.7V to 5V for VCC.
 The other CMOS device is a uC working at 2.7V.

Can the 2.7V device and the uC both operate at 3.3V?  Do you have (can you have) an IO bank running at 3.3V?
 
Can the 2.5V device (or a functional equivalent) be run at 3.3V ?
SIGNATURE:
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Summary:
1. Read the manual or user guide.  Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
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6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
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8. I am not paid for forum posts.  If I write a good post, then I have been good for nothing.

我想使用最少数量的监管机构。
但我认为在电路板上添加3.3V LDO将是最安全的解决方案，“我晚上可以睡得好”。
现在我要将VCCO_4,5与2.5V和其他VCCO连接到3.3V。



以下为原文

I wanted to use a minmum number of regulators. But I think adding a 3.3V LDO to the board will be the safest solution and "I can sleep well at night ".
 
Now I'm gonna tie VCCO_4,5 to 2.5V and other VCCOs to 3.3V.