在缓冲区切换期间或提交后，GPIF状态机DMA_RDY_THx，DMA_WM_THx标志不正确？

我有一个状态机传送GPIF到USB。从我的等待状态的转换被定义为DMAYRYDYTHX和！忙的地方是外部接口上的一个引脚，指示是否有数据就绪，Ithen读取此数据直到WM，读取其余的数据包，然后转回等待状态，发送USB数据包。
如果我回到等待状态，在我的外部接口上没有数据准备，那么它等待一段时间，然后转换！忙碌，一切都很好。如果它返回到等待状态，接口就已经存在了！然后，一些数据丢失（在GPIF上传输，但不通过USB传输）。唯一的结论是，当我处于等待状态时，DMAYRDY和DMA-WWM标志不正确。AN6997表明DMAγRyFLAG有3个周期的延迟，但插入一个虚拟状态的等待时间远大于此，不能解决问题。如果IDO提交一个较短的数据包，然后转移到等待状态，这也是正确的。
我只能认为，这可能是DMA标志在DMAbuffer切换期间无效？有没有一种方法可以检测缓冲区是从我的状态机切换过来的？



     以下为原文
  I have a state machine transferring GPIF to USB. The transition from my wait state is defined as DMA_RDY_THx&!BUSY where busy is a pin on the external interface to indicate if there is data ready, I then read this data until WM, read the rest of the packet and then transfer back to the wait state, the u*** packet is sent.
    If I get back to the wait state and there is no data ready on my external interface then it waits a while and transitions when !BUSY and everything works fine. If it gets back to the wait state and the interface is already !BUSY then some data is lost (transferred over the GPIF but not transferred over the USB). The only conclusion I can draw from this is that the DMA_RDY and DMA _WM flags are not correct when I am in my wait state? AN65974 indicates that there is a 3 cycle latency of the DMA _RDY flag but insertting a dummy state with considerably more wait than this does not fix the problem. This also seems to be true if I do a commit of a shorter packet and then transfer to the wait state.
    I can only think that this might be that the DMA flags are not valid during DMA buffer switching? Is there a way that I can detect the buffers are switching from my state machine?