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你好，
我寻求CSG325 0.8mm间距BGA封装的布局信息。 我想找到类似于UG112第87和88页中的建议，其中列出了焊盘尺寸，焊接掩模开口，焊盘尺寸等。 是否有像CSG325这样的芯片级封装的类似文件？ 皮特 以上来自于谷歌翻译 以下为原文 Hello, I seek layout information for the CSG325 0.8mm pitch BGA package. I would like to find recommendations similar to those found in UG112 pages 87 and 88 with listed pad size, solder mask opening, via pad size, etc. Is there a similar document for the chip scale packages like the CSG325? Pete 
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一项小小的研究表明，镀通孔（PTH）通孔和微通孔通常用于扇出0.8mm间距BGA封装。
这应该与您的董事会协商。对于我的项目，我只是决定采用更大的FGG484包。 价格差异可以忽略不计，我有房间。 Xilinx，请不要停止以1.0mm间距制作零件。 皮特 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 A little research has shown that both plated through hole (PTH) vias and micro vias are commonly used to fan-out 0.8mm pitch BGA packages. This should be negotiated with your board house. For my project, I just decided to go with the bigger FGG484 package. The price difference is negligible and I have the room. Xilinx, please don't stop making parts in 1.0mm pitch. Pete View solution in original post |
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我在UG475中找到了有关CSG封装的PCB设计的一些信息。
在第278页，它表示焊盘直径应为0.4毫米直径，焊接掩模开口直径为0.5毫米。 这些0.8mm间距BGA封装很难逃脱。 是否有必要使用微孔？ 这些部件是否有标准的逃生模式？ 我使用的是CSG325封装，我的电路板厚度必须为0.062英寸（1.57毫米）。 以上来自于谷歌翻译 以下为原文 I found some information on PCB design for the CSG packages in UG475. On page 278, it says the pad diameter should be 0.4mm diameter with a solder mask opening of 0.5mm diameter. These 0.8mm pitch BGA packages are tricky to escape. Is it necessary to use microvias? Is there a standard escape pattern for these parts? I am using the CSG325 package and my board must be 0.062" (1.57mm) thick. |
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我开始明白为什么没有推荐的CSG325扇出。
0.8mm间距BGA元件位于PCB通孔的边缘。 许多人在这个音调上使用微孔，这是一个复杂的主题。 以上来自于谷歌翻译 以下为原文 I begin to see why there are not recommended fanouts for the CSG325. 0.8mm pitch BGA components are on the edge of what is possible with through hole via PCB's. Many are using microvias at this pitch and that is a complicated subject. |
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@pedro_uno你是正确的，与更高音高的BGA相比，0.8mm的扇出有点棘手。
但这又取决于你计划如何实现它，即拥有更严格的高密度设计规则或增加电路板面积以适应更大的间距BGA。 采用高密度设计可以为每层提供更多的路径，最小的宽度/间距，盲孔，激光钻孔，但显然需要花钱。 在一天结束时，通过PCB布线，您可以根据成本进行权衡。 -------------------------------------------------- -------------------------------------------------- ----------------没有一个愚蠢的问题。 随意问，但快速搜索，以确保它还没有得到解答。 保持对话，获得Kudos和Accept Solution。 -------------------------------------------------- -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 @pedro_uno You are right in the sense that fanout with 0.8mm is a bit tricky compared to higher pitch BGA's. But again it depends on how you plan to implement it i.e. have tighter high-density design rules or increase the board area size to accomodate larger pitch BGA. Going for high-density design gives you more routes per layer with smaller minimum width / spacing, blind vias, laser drilling but obviously cost money. At the end of day, with PCB routing it's a tradeoff you make based on your cost. -------------------------------------------------------------------------------------------------------------------- There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered. Keep conversing, give Kudos and Accept Solution when you get one. ----------------------------------------------------------------------------------------------------------------------- |
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一项小小的研究表明，镀通孔（PTH）通孔和微通孔通常用于扇出0.8mm间距BGA封装。
这应该与您的董事会协商。对于我的项目，我只是决定采用更大的FGG484包。 价格差异可以忽略不计，我有房间。 Xilinx，请不要停止以1.0mm间距制作零件。 皮特 以上来自于谷歌翻译 以下为原文 A little research has shown that both plated through hole (PTH) vias and micro vias are commonly used to fan-out 0.8mm pitch BGA packages. This should be negotiated with your board house. For my project, I just decided to go with the bigger FGG484 package. The price difference is negligible and I have the room. Xilinx, please don't stop making parts in 1.0mm pitch. Pete |
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@pedro_uno这是正确的。
在进行PCB布局之前，请务必先了解Board Fab公司的容差和限制条件以及它们可以保证的内容。 Xilinx，请不要停止以1.0mm间距制作零件。 AFAIK，不要认为1.0mm间距封装在不久的将来会过时:) -------------------------------------------------- -------------------------------------------------- ----------------没有一个愚蠢的问题。 随意问，但快速搜索，以确保它还没有得到解答。 保持对话，获得Kudos和Accept Solution。 -------------------------------------------------- -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 @pedro_uno That is correct. Before doing your PCB layout, always preferabble to check with Board Fab houses what their tolerances and limitaions are and what they can guarantee. Xilinx, please don't stop making parts in 1.0mm pitch. AFAIK, don't think the 1.0mm pitch packages will be obsolete in near future :) -------------------------------------------------------------------------------------------------------------------- There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered. Keep conversing, give Kudos and Accept Solution when you get one. ----------------------------------------------------------------------------------------------------------------------- |
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