STM8S103F TIM1 CLK_PSC和CLK_CNT频率不匹配

嗨franco，
 
 您说您的信号宽度为10毫秒，但是时钟配置为16MHz且预分频器为0，TIM1溢出为65553，因此在65535/16000000 = 4.09 ms内。也许您应该使用更大的预处理器或更大的输入捕获分频器值（TIM1_ICPSC_DIV2，...）。
 我在FWLib / examples / TIM1 / TIM1_Input_Capture中找到了一个可以帮助你的例子。 （当我开始在STM8S中使用计时器时，这对我很有用）
 告诉我现在好吗
 
 带着敬意，
 低功率



以下为原文







Hi franco,

You said that your signal is 10msec width but with your clock config 16MHz and prescaler = 0, the TIM1 overflows at 65553 so within 65535/16000000 = 4.09 ms. Perhaps you should use a greater precaler or greater value of input capture divider (TIM1_ICPSC_DIV2,...).
I have found an example in FWLib/examples/TIM1/TIM1_Input_Capture that could help you. (It is was useful for me when I started using timers in STM8S)
Tell me if it is OK now

With regards,
be low power

我已经发现这也是我的问题，但是使用你的建议，我无法解决它。我试过调整HSIDIV和TIM1_ICPSC_DIV无济于事。不会使ICPSC_DIV更高可以捕获更快的信号，而不是更慢？或者我的思维倒退了吗？我这样说是因为TIM会更频繁地溢出，边缘之间的时间更长，即更慢的频率。
 
 
 CLK_DeInit（）;
 
 / *将Fcpu配置为DIV1 * /
 CLK_SYSCLKConfig（CLK_PRESCALER_CPUDIV1）;
 
 / *将HSI预分频器配置为最佳值* /
 CLK_SYSCLKConfig（CLK_PRESCALER_HSIDIV1）;
 
 / *在CLK_CCO引脚PE.0上输出Fcpu * /
 CLK_CCOConfig（CLK_OUTPUT_HSI）;
 CLK_CCOCmd（ENABLE）;
 
 / *根据CLK_InitStructure 24MHz * /启动时钟控制器
 status = CLK_ClockSwitchConfig（CLK_SWITCHMODE_AUTO，CLK_SOURCE_HSE，DISABLE，DISABLE）;
 
 while（CLK_GetFlagStatus（CLK_FLAG_HSERDY）== 0）;
 
 TIM1_ICInit（TIM1_CHANNEL_1，TIM1_ICPOLARITY_RISING，TIM1_ICSELECTION_DIRECTTI，TIM1_ICPSC_DIV8,0x0）;



以下为原文





I have figured out that this too is my problem, but using your suggestions, I can't get it fixed. I've tried adjusting the HSIDIV and the TIM1_ICPSC_DIV to no avail. Wouldn't making the ICPSC_DIV higher make it possible to capture faster signals, not slower? Or is my mind working backwards? I say this because the TIM will overflow more often with longer times between edges, i.e. slower freqs.


     CLK_DeInit();

     /* Configure the Fcpu to DIV1*/
     CLK_SYSCLKConfig(CLK_PRESCALER_CPUDIV1);

     /* Configure the HSI prescaler to the optimal value */
     CLK_SYSCLKConfig(CLK_PRESCALER_HSIDIV1);

     /* Output Fcpu on CLK_CCO pin PE.0*/
     CLK_CCOConfig(CLK_OUTPUT_HSI);
     CLK_CCOCmd(ENABLE);
                  
     /* Initilize the Clock controller according to CLK_InitStructure 24MHz */
     status = CLK_ClockSwitchConfig(CLK_SWITCHMODE_AUTO, CLK_SOURCE_HSE, DISABLE, DISABLE);

     while (CLK_GetFlagStatus(CLK_FLAG_HSERDY) == 0);

   TIM1_ICInit( TIM1_CHANNEL_1, TIM1_ICPOLARITY_RISING, TIM1_ICSELECTION_DIRECTTI,  TIM1_ICPSC_DIV8, 0x0);